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高手看过来!2650BU怎么用JIAG线救回来啊!在线等啊!

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发表于 2010-7-11 17:47:18 | 显示全部楼层 |阅读模式
本帖最后由 wuhandavid 于 2010-7-11 18:01 编辑

我的2650BU双U口的老猫!按照这个帖子的方法在做https://www.chinadsl.net/viewthread.php?tid=37615&highlight=JTAG,最后在写入CFE时,老是不成功!出现如下信息!望高手指点下是什么原因!     

       Broadcom BCM5354 KFBG
            Broadcom BCM5365
            Broadcom BCM6345
            Broadcom BCM6338
            Broadcom BCM6348
            Broadcom BCM6358
            Broadcom BCM6368
            Broadcom BCM6816
            PMC-Serria BRECIS MSP2007-CA-A1
            TI TNETD7300GDU(AR7WRD)
            TI TNETV1060GDW

USAGE: BrJtag /showflashlist
USAGE: BrJtag [parameter] </noreset> </noemw> </nocwd> </nobreak></revendian>
                      </notimestamp> </dma> </nodma> </noerase></initcpu>
                      </nompi> </ejtagslow> </pracc0> </waitbrk>
                      </bypass></forcealign></showppb></clearppb></erasechip>
                      </nocfi></forcenoflip>/forceflip
                      <window:XXXXXXXX><start:XXXXXXXX> </length:XXXXXXXX>
                      <port:XXX> </instrlen:XX> </fc:XX></skipdetect>
                      </wiggler></verbose>
            Required Parameter
            ------------------
            -backup:cfe
            -backup:tfe
            -backup:nvram
            -backup:kernel
            -backup:wholeflash
            -backup:custom
            -backup:bsp
            -erase:cfe
            -erase:tfe
            -erase:nvram
            -erase:kernel
            -erase:wholeflash
            -erase:custom
            -erase:bsp
            -flash:cfe
            -flash:tfe
            -flash:nvram
            -flash:kernel
            -flash:wholeflash
            -flash:custom
            -flash:bsp
            -probeonly
            Optional Switches
            -----------------
            /noreset ........... prevent Issuing EJTAG CPU reset
            /noemw ............. prevent Enabling Memory Writes
            /nocwd ............. prevent Clearing CPU Watchdog Timer
            /nobreak ........... prevent Issuing Debug Mode JTAGBRK
            /noerase ........... prevent Forced Erase before Flashing
            /notimestamp ....... prevent Timestamping of Backups
            /dma ............... force use of DMA routines
            /nodma ............. force use of PRACC routines (No DMA)
            /ejtag0............. with low speed ejtag access cycle
            /waitbrk............ wait until CPU enter debug mode
            /pracc0 ............ with safe PRACC access routine(Areg+Dreg)
            /initcpu............ load CPU configuration code
            /nompi.............. skip autodect flash base address with MPI Reg
            /revendian.......... reverse chip endian
            /window:XXXXXXXX ... custom flash window base&probe address(in HEX)
            /start:XXXXXXXX .... custom start location (in HEX)
            /length:XXXXXXXX ... custom length (in HEX)
            /verbose............ scrolling display of data
            /skipdetect ........ skip auto detection of CPU Chip ID
            /instrlen:XX ....... set CPU instruction length manually
            /wiggler ........... use wiggler cable
            /nocfi ............. disable CFI query flash geometry
            /forcenoflip ....... force not flipping CFI queried flash geometry
            /forceflip ......... force flipping CFI queried flash geometry
            /bypass ............ unlock Spansion bypass mode & disable polling
            /forcealign......... force erase address align with block boundary
            /erasechip.......... erase whole chip, only work with -probeonly
            /clearppb........... erase Spansion PPB,only work with -probeonly
            /showppb ........... show flash sector protection status
                                 only work with -probeonly
            /port:XXX........... customize parallel port(default XXX is 378)
                                 only work in Windows version
            /fc:XX = Manual Flash Chip Selection(disable CFI and ID auto match
                     use 'brjtag /showflashlist' show build-in flash list

NOTES: *) '-backup:', '-flash:' and '-erase:', the source filename must exist
           as follows: CFE.BIN, NVRAM.BIN, KERNEL.BIN, WHOLEFLASH.BIN or
           CUSTOM.BIN, BSP.BIN, TFE.BIN(64KB or 1x bottom Sector length CFE)
        *) Brjtag is only able to handle X16 Parallel Flash chip, The CPU
           native set length need 32Bit.
        *) Brjtag uses CFI command set to automaticlly detect flash chip
           parameters. If you have difficulty auto-detecting flash with CFI,
           '/nocfi' convert to orginal flash detection method. brjtag then use
           detected flash ID quary parameters from build-in flash list.
           particularly, you can use '/fc:XX' manually specify flash ID.
           'brjtag /showflashlist' can print build-in flash list
        *) '/forcenoflip' and '/forceflip' can help on some AMD type flash
           detecting sector structure correctly if CFI uses.
           'brjtag -probeonly /verbose' debug flash detection
        *) If you have difficulty with the older bcm47xx chips or when no CFE
           is currently active/operational you may want to try both the
           /noreset and /nobreak command line options together.  Some bcm47xx
           chips *may* always require both these options to function properly.
        *) When using this utility, usually it is best to type the command line
           out, then plug in the router, and then hit <ENTER> quickly to avoid
           the CPUs watchdog interfering with the EJTAG operations.
        *) /bypass - enables Unlock bypass command for some AMD/Spansion type
           flashes, it also disables polling
        *) /initcpu allow load config code to initialize the CPU. This may help
           BCM6358 prevent from some address non-accessable.
        *) '-probeonly /window:xxxxxxxx /erasechip' allow choose a workable
           sector address to erase whole chip. This may help on a bricked box
           with bad CFE
        *) /forcealign - enable erase sectors if the operation window is not
           aligned with sector boundary. It's risky! but can help erase some
           box NVRAM area whose sector size is larger than NVRAM definition
        *) /ejtag0 - enable 20ns delay behind each jtag shift cycle. This wish
           to increase LPT port compatiability for some high clcok PC
***************************************************************************
* Flashing the KERNEL or WHOLEFLASH will take a very long time using JTAG *
* via this utility.  You are better off flashing the CFE & NVRAM files    *
* & then using the normal TFTP method to flash the KERNEL via ethernet.   *
***************************************************************************

C:\JIAG>brjtag -flash: cfe
===============================================
Broadcom EJTAG Debrick Utility v1.8c-hugebird
===============================================
ABOUT: This program reads/writes 16x flash memory on the Broadcom MIPS(LE)
        Chip and compatible routers via EJTAG using either DMA Access
        routines or PrAcc routines (slower/more compatible). Processor chips
        supported in this version include the following chips:
            Supported Chips
            ---------------
            Broadcom BCM4702
            Broadcom BCM4704
            Broadcom BCM4712
            Broadcom BCM4716
            Broadcom BCM4705|4785
            Broadcom BCM5350
            Broadcom BCM5352
            Broadcom BCM5354 KFBG
            Broadcom BCM5365
            Broadcom BCM6345
            Broadcom BCM6338
            Broadcom BCM6348
            Broadcom BCM6358
            Broadcom BCM6368
            Broadcom BCM6816
            PMC-Serria BRECIS MSP2007-CA-A1
            TI TNETD7300GDU(AR7WRD)
            TI TNETV1060GDW

USAGE: BrJtag /showflashlist
USAGE: BrJtag [parameter] </noreset> </noemw> </nocwd> </nobreak></revendian>
                      </notimestamp> </dma> </nodma> </noerase></initcpu>
                      </nompi> </ejtagslow> </pracc0> </waitbrk>
                      </bypass></forcealign></showppb></clearppb></erasechip>
                      </nocfi></forcenoflip>/forceflip
                      <window:XXXXXXXX><start:XXXXXXXX> </length:XXXXXXXX>
                      <port:XXX> </instrlen:XX> </fc:XX></skipdetect>
                      </wiggler></verbose>
            Required Parameter
            ------------------
            -backup:cfe
            -backup:tfe
            -backup:nvram
            -backup:kernel
            -backup:wholeflash
            -backup:custom
            -backup:bsp
            -erase:cfe
            -erase:tfe
            -erase:nvram
            -erase:kernel
            -erase:wholeflash
            -erase:custom
            -erase:bsp
            -flash:cfe
            -flash:tfe
            -flash:nvram
            -flash:kernel
            -flash:wholeflash
            -flash:custom
            -flash:bsp
            -probeonly
            Optional Switches
            -----------------
            /noreset ........... prevent Issuing EJTAG CPU reset
            /noemw ............. prevent Enabling Memory Writes
            /nocwd ............. prevent Clearing CPU Watchdog Timer
            /nobreak ........... prevent Issuing Debug Mode JTAGBRK
            /noerase ........... prevent Forced Erase before Flashing
            /notimestamp ....... prevent Timestamping of Backups
            /dma ............... force use of DMA routines
            /nodma ............. force use of PRACC routines (No DMA)
            /ejtag0............. with low speed ejtag access cycle
            /waitbrk............ wait until CPU enter debug mode
            /pracc0 ............ with safe PRACC access routine(Areg+Dreg)
            /initcpu............ load CPU configuration code
            /nompi.............. skip autodect flash base address with MPI Reg
            /revendian.......... reverse chip endian
            /window:XXXXXXXX ... custom flash window base&probe address(in HEX)
            /start:XXXXXXXX .... custom start location (in HEX)
            /length:XXXXXXXX ... custom length (in HEX)
            /verbose............ scrolling display of data
            /skipdetect ........ skip auto detection of CPU Chip ID
            /instrlen:XX ....... set CPU instruction length manually
            /wiggler ........... use wiggler cable
            /nocfi ............. disable CFI query flash geometry
            /forcenoflip ....... force not flipping CFI queried flash geometry
            /forceflip ......... force flipping CFI queried flash geometry
            /bypass ............ unlock Spansion bypass mode & disable polling
            /forcealign......... force erase address align with block boundary
            /erasechip.......... erase whole chip, only work with -probeonly
            /clearppb........... erase Spansion PPB,only work with -probeonly
            /showppb ........... show flash sector protection status
                                 only work with -probeonly
            /port:XXX........... customize parallel port(default XXX is 378)
                                 only work in Windows version
            /fc:XX = Manual Flash Chip Selection(disable CFI and ID auto match
                     use 'brjtag /showflashlist' show build-in flash list

NOTES: *) '-backup:', '-flash:' and '-erase:', the source filename must exist
           as follows: CFE.BIN, NVRAM.BIN, KERNEL.BIN, WHOLEFLASH.BIN or
           CUSTOM.BIN, BSP.BIN, TFE.BIN(64KB or 1x bottom Sector length CFE)
        *) Brjtag is only able to handle X16 Parallel Flash chip, The CPU
           native set length need 32Bit.
        *) Brjtag uses CFI command set to automaticlly detect flash chip
           parameters. If you have difficulty auto-detecting flash with CFI,
           '/nocfi' convert to orginal flash detection method. brjtag then use
           detected flash ID quary parameters from build-in flash list.
           particularly, you can use '/fc:XX' manually specify flash ID.
           'brjtag /showflashlist' can print build-in flash list
        *) '/forcenoflip' and '/forceflip' can help on some AMD type flash
           detecting sector structure correctly if CFI uses.
           'brjtag -probeonly /verbose' debug flash detection
        *) If you have difficulty with the older bcm47xx chips or when no CFE
           is currently active/operational you may want to try both the
           /noreset and /nobreak command line options together.  Some bcm47xx
           chips *may* always require both these options to function properly.
        *) When using this utility, usually it is best to type the command line
           out, then plug in the router, and then hit <ENTER> quickly to avoid
           the CPUs watchdog interfering with the EJTAG operations.
        *) /bypass - enables Unlock bypass command for some AMD/Spansion type
           flashes, it also disables polling
        *) /initcpu allow load config code to initialize the CPU. This may help
           BCM6358 prevent from some address non-accessable.
        *) '-probeonly /window:xxxxxxxx /erasechip' allow choose a workable
           sector address to erase whole chip. This may help on a bricked box
           with bad CFE
        *) /forcealign - enable erase sectors if the operation window is not
           aligned with sector boundary. It's risky! but can help erase some
           box NVRAM area whose sector size is larger than NVRAM definition
        *) /ejtag0 - enable 20ns delay behind each jtag shift cycle. This wish
           to increase LPT port compatiability for some high clcok PC
***************************************************************************
* Flashing the KERNEL or WHOLEFLASH will take a very long time using JTAG *
* via this utility.  You are better off flashing the CFE & NVRAM files    *
* & then using the normal TFTP method to flash the KERNEL via ethernet.   *
***************************************************************************

*** ERROR - Invalid [option] specified ***

C:\JIAG>
发表于 2010-7-11 20:18:11 | 显示全部楼层
JTAG有个图形界面的软件、、、在ADSL相关区里、、
https://www.chinadsl.net/thread-43693-1-2.html
cfe和软件放在同一个目录、、、CFE名字改成CFE128.BIN
 楼主| 发表于 2010-7-12 05:26:53 | 显示全部楼层
求知道的高人在指点一下,看上面信息到底是我那没有设置对或其他原因
发表于 2010-7-12 12:45:56 | 显示全部楼层
芯片没认出来,你把连接线尽量的缩短最好在10CM内,再试试!
 楼主| 发表于 2010-7-12 15:45:05 | 显示全部楼层
芯片没认出来,你把连接线尽量的缩短最好在10CM内,再试试!
anwei1012 发表于 2010-7-12 12:45



    连接线是指从板子上引出的线,还是指JIAG线在弄短点呢?
 楼主| 发表于 2010-7-12 15:46:34 | 显示全部楼层
芯片没认出来,你把连接线尽量的缩短最好在10CM内,再试试!
anwei1012 发表于 2010-7-12 12:45



    连接线是指从板子上引出的线,还是指JIAG线在弄短点呢?
发表于 2010-7-12 16:31:15 | 显示全部楼层
是指JATG口到电脑并口的线
发表于 2010-7-12 16:37:39 | 显示全部楼层
忘了,你用这个两个版本的BRJTAG试试看

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 楼主| 发表于 2010-7-13 10:12:27 | 显示全部楼层
谢谢楼上的兄弟,问题解决了!关键的命令被搞错了,写入CFE的命令C:\JIAG>brjtag -flash: cfe  在冒号后面没有空格!就是这搞了2天才搞定
发表于 2010-7-18 23:29:02 | 显示全部楼层
看晕了,不知道咋弄了。
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