输入用户名密码的时候一闪而过，来不及输入，按Ctrl+c或者D都不能中断6 K6 d9 W2 A, e: ^! ]
SPI NAND$ N4 K/ p. Y2 s9 d$ A
start read bootloader7 e. m4 @+ Q' N
non secure boot/ T7 R5 r" ^! h& A* ]6 M
Jump% P# _# P4 V6 S/ m1 u; H/ M3 O7 j
) l1 M' E2 _) y: s" qenter bootloader...
! L6 W1 k9 N' v; ^: ppll init, cpu freq=1000 MHz2 j7 ^) r2 ^4 U' Z: j8 S* I, ]2 F
7 S& T) Y& V( N/ R( E8 a- Tcrpm init ok+ s0 w. J; k+ y8 g. [" Y' I
DDR3 16bit 1600 Mbps7 m2 G' J- q, ~1 {! Y. y* c
DDR3 size 0x20000000=512MiB) L/ o; H2 P" c2 r, R( q0 f
4 I. u7 E; n* x3 A8 F) l6 ~ddr init ok
1 }/ A# b. s* n- E! r5 K
) A+ l1 K$ }$ R6 @6 P8 D# X2 O& V3 e+ u- \# I
U-Boot 2021.01-svn308776 (Oct 25 2024 - 18:28:46 +0800)
; y2 o! R/ c s1 K. l( I; y
7 \- f' O& B7 uCPU : ZX279133@A53x2,1000MHZ- L- S1 s: Z! z
Model: ZTE 133
" H5 s, G* a/ TDRAM: 512 MiB
/ o$ n# T! z/ b Z; d" MRelocation Offset is: 17f3c000, fdt_blob: 0x9f6efd40
- P$ c9 N5 H9 k Q. Hclk_register: failed to get sd_wclk_mux device (parent of sd_wclk_div), idx = 0
$ ?# w6 z* A7 L. iclk_register: failed to get nand_xclk device (parent of nand_wclk), idx = 1- Y: b+ {. G; o9 _. p; q
clk_register: failed to get clk1376m_div device (parent of pon_core_clk_mux), id x = 2
( s8 t& G. S+ i4 qclk_register: failed to get clk40m device (parent of pcie_25m_mux), idx = 3
) z, C, [8 ^& H" N6 lclk_register: failed to get pon_tm_aclk device (parent of tzc400_pon_aclk), idx = 4
% k( X, M; ~% Q. z$ M. uvid is [2]2 y9 Y/ [' l- K5 Q& p* F6 b
leds DTS probe by vid, successed& |3 C; v ^; S u
Disable watchdog.
9 f6 `+ {0 L. t0 Z0 [el=3# a" a# ` X6 u" `9 i2 R
NAND: zs->cs_regmap 0000000000000000/ g0 U; t* d; d$ Z5 }
zx_sfc_probe: enter
6 X# s- N& f3 b! ^1 M* nzx_sfc_probe: done b# y# c' J5 |; z" x) f! u- G# M
spi_nand spi-flash@0: READ ID data: ef-aa-22, Winbond SPI NAND was found.% U- F7 P! m$ u) R7 o2 }$ k# D
spi_nand spi-flash@0: 256 MiB, block size: 128 KiB, page size: 2048, OOB size: 1 28
1 y& V0 @8 r) l. O Y6 gspinand name:spi-nand0
- V- D" R9 d/ {, K) d3 ]Creating 15 MTD partitions on "spi-nand0":+ Q: z, t- Z( T
0 MiB3 w& U3 ?" T8 ?% f8 j2 R
Loading Environment from NAND... OK
$ t6 {2 L9 X/ R: K0 X9 A5 Y7 X+ tIn: serial
* V6 ~* p. @8 S( q; EOut: serial
- m$ _7 ]# [" i4 |- l+ D, nErr: serial
) ]! o" k- n |, n: ~5 ~clk_pll env is not setted, core clk won't change
- J) Y$ _ |! \: a. S* \read partition others6 G6 \4 I: r$ `! W, P4 c
Size not on a page boundary (0x800), rounding to 0x800
; U* p8 ]- c {Reading 2048 byte(s) (1 page(s)) at offset 0x00580000
$ Y8 u6 {& z! L& T9 r6 m+ X[ERROR] SOFT VID(0x13300002) set failed, please set it again!" I2 S/ Q- ^ N V# g
vid is [2]
& Y, v4 B$ J' j0 Eenter outerphy info init!
3 q1 L1 x/ c% d+ s9 B/ v/ [get board_info_id by fdt,the phy_id is 0x22 C. \5 |0 H4 a7 }
Net: rx data disable
% }5 A1 b. N) b ~" k' ^- p: QThe initial value of mdio_8226_id is 1.
* Z( D- j% J/ [* _innerGeLedPolarSet 1
1 U7 a( S1 [2 u/ U0 R$ X) F8 @innerGeLedPolarSet 1
7 @& Y- t2 Z; N1 z$ I) }innerGeLedPolarSet 1
' T$ h: K/ j/ U8 K+ [- W- P/ LinnerGeLedPolarSet 1
" A0 l+ H" f5 O! Emdio_miiphy_initialize ok
: X U, ?7 R" t- n+ {enter gpon pon pll cfg# `; O/ ?: f2 X6 }
mode_xgpon_nsyn_cfg_133
$ q/ P& I6 [ B: v. K# t# Dcom_pll_lock_ready
8 d2 `! d# o/ f1 ~/ ]0 j( K) i3 Arx los =0 rx data in2 X+ a( w5 I$ n# p
cdr_lock_ready, n0 |2 V0 B1 [+ I5 t& Z
pon serdes init succeed
: H& u) b; m$ p[get_dts_bosa_and_switch_ponmode_info] bosa_and_switch_ponmode_info=0x5200040.+ T- C+ }: I3 z6 Q* m" p
[zx_pon_mode_init] switch_ponmode=0x40,multi_bosa_en=0x0,bosa_type=0x2.
1 _( o- a3 S5 g" b3 hread partition others
" f1 u) Z0 N8 s+ `9 E) a( XReading 4096 byte(s) (2 page(s)) at offset 0x00000000
: r7 H: @4 F1 h3 ?+ D8 N2 x9 G[zx_get_private_profile_uint] pKeyName=skyregioncode value=307 tmp=0x00000133) |3 u8 Y5 G; s9 L# a8 v
[zx_pon_mode_init]regioncode = 307% F2 ^ b+ ~/ y; Y c+ I( o
read partition others7 E% Q6 { b, K$ Q: S- t
Reading 4096 byte(s) (2 page(s)) at offset 0x00000000
) u M8 [2 u& [0 Y; L- u[zx_get_private_profile_uint] pKeyName=factoryrestore value=0 tmp=0x00000000
5 g; K5 \$ V7 T- X/ i6 Lread partition others5 H$ T) J* }% a7 O
Reading 4096 byte(s) (2 page(s)) at offset 0x00000000- K% \, R" ]/ Q: a
[zx_get_private_profile_uint] pKeyName=UpModeInfo value=64 tmp=0x00000040
/ H& K; w: d4 F$ r0 Z[up_mode_get] UpModeInfo=0x40 ponmode_auto_en=0 upmode=0x40 lan_up_port=0 wlan_u p_port=0+ Z9 U$ t; l7 r( X+ n9 C
[up_mode_check_verify] upmode=0x40 ponmode_auto_en=0 lan_up_port=0 wlan_up_port= 0
- M5 A# v" a [' z8 ]read partition others
3 n6 D+ t4 v+ ]- I- bReading 4096 byte(s) (2 page(s)) at offset 0x00000000
0 ~( b! F( g) J[zx_get_private_profile_uint] pKeyName=UpModeInfo value=64 tmp=0x000000405 `) I% G- ]6 H5 L2 b" f0 R
[modify_bootargs_UpModeInfo] UpModeInfo_str=UpModeInfo=0x000000403 ?* T; A3 @9 M" Y+ |6 U
eth0
1 C' T; R1 i4 V7 p3 j* A4 qHit any key to stop autoboot: 0
9 o" ]' @+ F n. H1 n1 Vread partition others$ N8 v4 h. g' O7 o$ W0 a
Reading 4096 byte(s) (2 page(s)) at offset 0x000000002 \3 E: u, ~! H, a
do_mcupg function enter..4 g4 e' ~/ o: ^9 Z
val =0xffffffff, reg = 0x192c0004, |# ^7 h0 Q) v' i2 y* U7 D Z
reset val =0xfffffffe
7 U v! m; Z8 arestore val = 0xffffffff
: B% z8 @2 U: }' W( w0 m( I8 Dread SOPC_CLR_OVER_READY_SMAC = 0x1, mac = 0x0
- b" H$ w+ y2 F- |) t7 \write SOPC_SEND_EN_CFG_SMAC,mac = 0x0
6 m! x: @- k2 T+ K9 kval =0xffffffff, reg = 0x192c0004
2 E5 P8 l- O2 f' A/ z) u1 nreset val =0xfffffffd$ `& R1 W5 l1 p* N
restore val = 0xffffffff0 J- h/ L p+ I/ U# v- p6 G7 i
read SOPC_CLR_OVER_READY_SMAC = 0x1, mac = 0x1
+ j# N$ K, _4 [2 @, e1 p' Qwrite SOPC_SEND_EN_CFG_SMAC,mac = 0x1+ q4 [& D5 |& a" _
val =0xffffffff, reg = 0x192c0004: e: R$ |6 F% Z6 w; k d: z) y7 G: ]
reset val =0xfffffffb2 ?0 t3 h. s( G9 C
restore val = 0xffffffff( o" |! n& E/ }$ j1 g
read SOPC_CLR_OVER_READY_SMAC = 0x1, mac = 0x2. |) U0 K5 o& k! W. ~
write SOPC_SEND_EN_CFG_SMAC,mac = 0x2
0 C# R7 D, u" _! hval =0xffffffff, reg = 0x192c0004' g9 V( D2 I- s( A
reset val =0xfffffff7
0 B) k& j+ ?5 ?. o% nrestore val = 0xffffffff! w) C R% }5 N/ x* @) _, Z2 q% b
read SOPC_CLR_OVER_READY_SMAC = 0x1, mac = 0x3
! w/ b8 C6 D8 j/ swrite SOPC_SEND_EN_CFG_SMAC,mac = 0x32 c# r0 F( F z% B! u8 C/ D+ j
enter outerphy info init!$ H3 y* |4 ~$ A0 \: f2 ^1 l
get board_info_id by fdt,the phy_id is 0x2
; _. C2 L! ]( _7 e/ @[outerphy_phy_init]Warning: No outerphy on this port<6>7 r# {/ @ V& m: Q
enter outerphy info init!3 Y. c* x( W: X
get board_info_id by fdt,the phy_id is 0x2) ^ K/ K* u( V
--->phy identifier is [0xc849]
9 B u1 T- G" X. ? r4 [. @5 serdes option is 0, E# {0 Y7 P( ]) D! P4 ]
xmac0 is used.
9 n8 Y4 k7 W5 B7 P* |enter outerphy info init!
! C* N; b# u7 q. z$ S' }5 Xget board_info_id by fdt,the phy_id is 0x22 W9 n+ A! U Q4 J, R/ X/ f
can't find this index!% i2 F1 u/ D; s' U8 c% c
[outerphy_phy_init]Warning: No outerphy on this port<5>! K: L6 a9 p& U; N
idm_ddr_base is 0x00000000b0000000; m6 t2 K z+ m6 P ^+ q6 d
enter gpon pon pll cfg* `( w; ]4 W* P
mode_xgpon_nsyn_cfg_1336 W0 G' S& x/ ^- r3 {8 \0 l! I
com_pll_lock_ready
4 R( f/ I* }+ r- I8 Zrx los =0 rx data in
" y8 J/ [" A" @ P6 tcdr_lock_ready! p" k! e8 p. _
pon serdes init succeed
! O1 d# G& v# ?9 w4 w" Q0 u% ~& Nnp init ok
* a, ` I {) w( q3 l O# mmac 0 link down# k6 {( W" c z% r6 V+ X j7 v
mac 1 link down3 H5 |1 k# z# N+ B$ H* p* t' m. I$ r6 }
mac 2 link down
+ g6 p% A; \$ M& G/ Lmac 3 link down
: z) d6 d( R H0 T+ Lmac 4 link down* f0 z5 r9 \7 o9 d
multi upgrade check timeout.
. w& P. j+ ^( YReceive multicast packet failed (>.<)
0 A2 S3 J& m0 Q# t& J* }read partition others7 a4 a8 R5 i8 _( n! _2 M X/ v: ~
Reading 4096 byte(s) (2 page(s)) at offset 0x00000000
5 }, L9 }( \5 e2 oBootImageNum=0x00000000,08 @! L) W# f. P! o4 L
name is kernel0,offset is 0x200000
, ~# A5 e7 Y( a+ a. ]; S9 f$ I# Kread partition kernel0) a2 k1 G; B6 A+ v$ P
Size not on a page boundary (0x800), rounding to 0x14ae000& W5 l' ^2 a& L P, Q9 c
Reading 21684224 byte(s) (10588 page(s)) at offset 0x00000000
% b) I' {, }% [; ofind kernel0 flash entry is 0x2000006 u6 L/ Q9 J5 K, k* D7 _1 @
read partition boot
) q/ v( Q+ E7 t. s8 VReading 1572864 byte(s) (768 page(s)) at offset 0x00000000
5 _- J0 v1 V6 p3 h4 hset bootargs,str is console=ttyAMA0,115200n8 rdinit=/sbin/init U-Boot 2.0.0 2024 1025183308 0x200000 0x0 0x83 0x83 UpModeInfo=0x00000040
& K+ a. S O n" n; T/ gset bootargs,str is console=ttyAMA0,115200n8 rdinit=/sbin/init U-Boot 2.0.0 2024 1025183308 0x200000 0x0 0x83 0x83 UpModeInfo=0x00000040 regioncode=0x133
( ^- {5 D' E0 B; \Saving Environment to NAND... Erasing NAND...- b5 A* R4 f8 F3 z4 N
Erasing at 0x1c0000 -- 100% complete.
7 m; T, R0 F0 c7 R* t2 f* h; DWriting to NAND... OK& w! U/ K2 v+ y7 b
OK6 F7 b" I, W* S7 u; j
config string: #conf@133& `6 E& e# a5 o
## Loading kernel from FIT Image at 88000000 ...
6 y* L9 F i9 @0 _; G Using 'conf@133' configuration
# A ^6 n; P; B/ c% y4 j& Z) c Trying 'kernel@133' kernel subimage1 r5 [: J2 q6 k" o ?. t$ _7 o3 a
Description: Linux kernel for 133
' t% n! I) {( ~% w; L) S Type: Kernel Image
7 ~) c! I+ c) F- B Compression: gzip compressed( D* {. `( I* h' Y- l/ D8 M
Data Start: 0x880000f4% T8 j( a1 ^) S
Data Size: 4815863 Bytes = 4.6 MiB! s2 k6 x3 j- I; c4 E" V6 }- Q
Architecture: AArch646 Q- J2 a, ^3 q
OS: Linux1 I0 \- E$ ^0 E1 |6 P
Load Address: 0x80080000
! n, }/ ]0 s7 d" |' y8 k Entry Point: 0x80080000" K/ [+ y9 w+ C: i' [8 N8 o
Verifying Hash Integrity ... OK% @0 b D: B7 X
## Loading ramdisk from FIT Image at 88000000 ...
2 n* j. A1 T7 S3 e" y Using 'conf@133' configuration7 D; Y& K+ |4 n$ |0 n% ]4 @
Trying 'initramfs@133' ramdisk subimage
, u* d r, ]2 _& ~$ v1 g w Description: initramfs for 133. U3 N$ k9 m; |: ?+ l$ M
Type: RAMDisk Image9 x0 W# U8 j) U/ ]$ k
Compression: lzma compressed
' ^8 s4 p5 A0 K9 n3 I Data Start: 0x884a3f24) H! p+ t! K' R0 l, U& m4 ^
Data Size: 16815245 Bytes = 16 MiB
& p% O/ d' Z) S/ [9 k6 q3 T Architecture: AArch64
6 x. f# E5 F! c3 I OS: Linux4 A, E M) }" i1 j5 x u4 f z
Load Address: 0x00000000
: x. z& S; E' a. J8 ^2 @8 o Entry Point: 0x00000000
4 U3 A2 d! t7 _2 N; J Verifying Hash Integrity ... OK" w4 f8 `5 e: `& z# j
WARNING: 'compression' nodes for ramdisks are deprecated, please fix your .its f ile!
( k) v1 s" M1 u3 x J/ u$ v## Loading fdt from FIT Image at 88000000 ...
9 K% i& ^6 x& i& Q) p( i1 o5 F8 W Using 'conf@133' configuration
* V/ r8 @" c0 |% g Trying 'fdt@133' fdt subimage# ~* J% e. z. c! @4 {2 \: _5 d
Description: Flattened Device Tree blob for 133
' r" \- v0 a' g) e) V Type: Flat Device Tree1 m' h1 w! s) U$ O) k( a; S( J2 d
Compression: uncompressed
! m U! n7 \1 R O$ `$ i# ~" b Data Start: 0x88497dc8
' K9 H T3 N, j/ h2 i9 i Data Size: 49307 Bytes = 48.2 KiB
: H6 ?; g: A; h B Architecture: AArch64
; ~/ E1 C; ]5 w2 E) G. S) I Load Address: 0x82000000+ n( y! ~1 i+ Q' E2 Z8 d
Verifying Hash Integrity ... OK' J. ]2 N% v7 e
Loading fdt from 0x88497dc8 to 0x820000009 b+ N; G. D0 _& z( Z- J
Booting using the fdt blob at 0x82000000
8 c8 G: v& E) W2 e6 a Uncompressing Kernel Image
* [& `9 w9 t6 m- ^3 } Loading Ramdisk to 9dff2000, end 9effb48d ... OK
* l( O6 Y0 ~% I Loading Device Tree to 000000009f6de000, end 000000009f6ed09a ... OK
; F( Y* B. R2 u6 ^+ w1 ]ft_board_setup
) ]& @$ E/ y% w# ]8 Zft_fixup_flash spi-nand0
2 \( H: a7 ]* \ S& uft_fixup_flash-spinand+ Z5 z, k0 C5 h* o, C& U
$ x- I/ P7 D5 p+ T4 U
Starting kernel ...
- E2 e0 L! c" V; E- p* l' w* S
( ^" B+ |- G5 k$ e& }CPU0: Set slave cpu addr = 0x00211A8C
1 Y% u. p$ o7 p- Y: s' w! l% h* ~SLAVECPU: Cpu = 00000001 online successfully in psci!" a) X! y5 }. ~+ \3 F! ^$ Q
init psci ok!!/ e% _" ~& T5 y* B; p5 R
CPU ON: Target cpu = 00000001 entry = 0x8072B1E01 W" J& d+ a1 X# ~) `/ H$ b3 M$ J4 T' W
CPU1: Jump to linux kernel entry = 0x8072B1E0- z9 t& p2 X1 i" G( H: x
Booting Linux on physical CPU 0x0000000000 [0x410fd034]. _: z$ \+ l3 {% }5 Z- K& y/ j
Linux version 4.19.136+ (chenmengxue@skyworth) (gcc version 5.3.1 20160412 (Buil droot 2017.05)) #4 SMP Fri Oct 25 18:33:08 CST 2024 p( f+ n% ^ U0 D; r, [: R
Machine model: ZTE 1335 K* B8 N7 P% \# U; H& x9 ?
zx_resv_mem: base 0x0000000080b23000 vbase 0xffffffc000b23000 size 0x3245000: Z2 q' u5 }; Z* C2 [1 Y
OF: reserved mem: initialized node pon_rsvmem, compatible id zxic,resv-memory' W$ P* {$ `1 f/ W
psci: probing for conduit method from DT.
3 g& {3 f. A- H& e+ h1 {$ Z" |$ Spsci: PSCIv1.0 detected in firmware.
3 ]- E+ {4 n: |% j3 F5 ypsci: Using standard PSCI v0.2 function IDs
- Z! z+ a* l7 E% \1 u5 {9 R ]( C# e7 {psci: Trusted OS migration not required4 @5 T9 ~+ h/ ?( p6 o$ p
psci: SMC Calling Convention v1.0
) I- C8 q {+ L3 b3 `( V/ l: Nrandom: get_random_bytes called from start_kernel+0xb0/0x414 with crng_init=0
4 ` r- Y; U* o) l+ wpercpu: Embedded 48 pages/cpu s157016 r8192 d31400 u196608
: P2 E+ q+ {$ j/ R- L" [Detected VIPT I-cache on CPU08 w: R6 H! U0 {, F
CPU features: enabling workaround for ARM erratum 845719
1 R3 P: O$ V: k& ^ ^Built 1 zonelists, mobility grouping on. Total pages: 129024
$ X, t! p3 } Z3 dKernel command line: console=ttyAMA0,115200n8 rdinit=/sbin/init U-Boot 2.0.0 202 41025183308 0x200000 0x0 0x83 0x83 UpModeInfo=0x00000040 regioncode=0x133
3 D2 e7 i4 j4 W6 y$ Azxic : zxic_cmdline_console : ttyAMA0 ?+ {. x3 S4 p z. T- r
[init_up_mode_info] g_UpModeInfo=0x40* O* o6 v4 L) T. f5 ?, k# o
[init_regioncode] g_regioncode=3074 a! b" i& Z2 g& O" s
Dentry cache hash table entries: 65536 (order: 7, 524288 bytes)
5 `9 Q8 T5 `0 H) V! _. y% y" `" \Inode-cache hash table entries: 32768 (order: 6, 262144 bytes)
! k8 z, ?( G$ `( ~! p9 ?0 T2 fMemory: 403064K/524288K available (6846K kernel code, 506K rwdata, 2380K rodata, 640K init, 441K bss, 121224K reserved, 0K cma-reserved)
$ l% _ D4 p) _$ B$ V. f2 iSLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1
+ L, n0 [5 I/ ~: \rcu: Hierarchical RCU implementation.
, N1 g/ G- _" Vrcu: RCU event tracing is enabled.
. i% L6 Q- u7 Nrcu: RCU restricting CPUs from NR_CPUS=4 to nr_cpu_ids=2.
3 Z, E8 z3 P6 J+ q& j$ M5 t/ _rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=2
0 ~8 }! g% D5 N( z8 v$ \/ x1 ]# TNR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
( R2 V2 ^8 v2 s1 ^) EGICv3: Distributor has no Range Selector support4 o- A1 j* S! c) H. x+ n2 C
GICv3: no VLPI support, no direct LPI support
9 n$ J9 F* f- i) l' S3 eGICv3: CPU0: found redistributor 0 region 0:0x0000000000540000
3 |, y/ H$ } n3 [' Z8 z& fclk_common: pll_2000m_clk:register pll
3 o, ?/ l. s# s. u1 Q a* ]clk_common: func of_zx_clk_parse_pll nr rate is 11
7 r8 E6 c) t' Q% @clk_common: pll_2000m_clk:no paticular pll-enable-register, use default cfg reg& ^& e$ Y/ V1 U, _$ g
clk_common: pll_lsp_2000m_clk:register pll$ C1 e T$ N' K- j9 x* Y* ^6 M
clk_common: pll_lsp_2000m_clk:failed to find property zx-clock,pll-en-bit& B- u; `# `" K( e9 l0 R
clk_common: pll_1376m_clk:register pll
; X4 _/ L. X6 E) B1 Y2 E! Zclk_common: pll_1376m_clk:failed to find property zx-clock,pll-en-bit! b; b6 x- W' w% v
clk_common: pll_fpp_2500m_clk:register pll
4 @4 Y$ i" N5 W" S2 w/ m) oclk_common: pll_fpp_2500m_clk:failed to find property zx-clock,pll-en-bit+ z# i8 d) }( f6 v" c) c, |% u! }9 v' s
arch_timer: cp15 timer(s) running at 25.00MHz (virt).4 f h5 q; F$ o# L2 {5 g. `
clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x5c40939b5, m ax_idle_ns: 440795202646 ns
$ N; n% D" A5 X) _! W4 s& V# _- F( zsched_clock: 56 bits at 25MHz, resolution 40ns, wraps every 4398046511100ns: I1 o- m i. p
Console: colour dummy device 80x252 f7 G+ q6 X. D& ]# N6 p& u
Calibrating delay loop (skipped), value calculated using timer frequency.. 50.00 BogoMIPS (lpj=250000)
7 Q8 |$ r( p; C3 H2 Ypid_max: default: 32768 minimum: 301$ o1 u' P3 ^$ J% e5 O
Security Framework initialized( D1 z' q' u" ~ O( a
Mount-cache hash table entries: 1024 (order: 1, 8192 bytes)
$ r! E& m O7 s# q) ~8 e4 dMountpoint-cache hash table entries: 1024 (order: 1, 8192 bytes)* u& o+ v+ I, l( Z
ASID allocator initialised with 32768 entries. @7 O% ~8 H" L9 ]# N% L
rcu: Hierarchical SRCU implementation.
# q; U! F0 W O' ?' t7 pcommon ,zxic_early_init7 p. U& C2 {% r/ P; f1 ]5 ~4 c6 Y
smp: Bringing up secondary CPUs ...
% f6 G' M/ \7 h* ~- ?* D/ ^Detected VIPT I-cache on CPU1* q8 M! U& i. Y3 ]
GICv3: CPU1: found redistributor 1 region 0:0x0000000000560000# E" A2 y/ c2 E+ B9 M7 d
CPU1: Booted secondary processor 0x0000000001 [0x410fd034], h$ \' m9 p! J% }0 B/ X2 t
smp: Brought up 1 node, 2 CPUs
* X1 X! [6 U) S) X% M5 |; mSMP: Total of 2 processors activated.
9 U& z7 O& G& M" l6 C& I9 j0 ?CPU features: detected: GIC system register CPU interface, S2 ~2 B2 \5 B5 C# i! h
CPU features: detected: 32-bit EL0 Support( w& Z! K9 l E
CPU: All CPU(s) started at EL1
9 `) u. I% U2 @" lalternatives: patching kernel code
( ~* P c& [1 n w& o& Bdevtmpfs: initialized0 z5 V' f, ^; Q# z: w! j. I9 Q& D) X
clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 1911 2604462750000 ns
1 D( y9 j& r% R* @. }0 ]futex hash table entries: 512 (order: 3, 32768 bytes)$ e$ ^0 G- A4 A
pinctrl core: initialized pinctrl subsystem: |7 l. j: c1 _: G
NET: Registered protocol family 16
: F' h) z# d$ M( m2 Ccpuidle: using governor ladder ^8 }4 x7 r2 K4 P% @3 ^
hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.# P u. g! [9 Y& \4 Q' Y- ?8 I
DMA: preallocated 256 KiB pool for atomic allocations
5 c* ]2 D- j* \9 J9 \Serial: AMBA PL011 UART driver
+ s, Y& y: U; B. C! {* bzx reset init
8 }% m! G- O. Z: N' A- |zx2967-reset 10e10060.toprst: reset controller cnt:32; c* _+ `% x1 m! q h. o
zx2967-reset 10e10070.localrst: reset controller cnt:641 c5 ^3 s0 P4 u) v! e* ^. R# h
zxic-pinctrl 10e20000.pinctrl: invalid pin list in gpio-range node' M% k# v4 Q) ?& x, k
zxic-pinctrl 10e20000.pinctrl: invalid pin list in bank-range node
6 `# ^$ _. o. Q5 `10d0d000.serial: ttyAMA0 at MMIO 0x10d0d000 (irq = 16, base_baud = 0) is a PL011 rev1
: U0 i# z* i& f' J6 Xconsole [ttyAMA0] enabled
m; a5 R ?2 A" G: ?! i: }zte-msi 1f400000.msi: zx pcie msi probe enter!!!!!!
! A* [! x* i, H; @# [zte-msi 1f400000.msi: parent_node->name : interrupt-controller
. N5 ^) J! X& bzte-msi 1f400000.msi: parent->name : :interrupt-controller@00500000-1) L; B1 Z: h+ W8 A5 C4 W4 p
zte-msi 1f400000.msi: zx pcie msi 1 initail!!8 F- T' l/ E7 D3 @, j6 X
zte-msi 1f400000.msi: dbi_base : 0xffffff8009400000/ E0 ? _7 q& `. m3 v" l5 ?
zte-msi 1f400000.msi: vector_phy : 0x10e00004
* C9 e3 ~ y+ tzte-msi 1f400000.msi: num-vectors : 0x20' C- `$ x% x- U1 P. P
zte-msi 1f400000.msi: status-of-woe : 0x0& g* l3 v& v0 | ^" @0 W
zx-efuse 14f11000.efuse: efuse init ok, clock rate = 25000000( T' \1 ]+ B5 U- X$ F5 x6 [5 t
vgaarb: loaded
8 Q% |4 x; _( @! GSCSI subsystem initialized
9 i8 @" s2 u$ Dusbcore: registered new interface driver usbfs
5 f- ?- ~8 n3 C) N* ^9 j# A4 _0 n' Uusbcore: registered new interface driver hub3 V& w) k: M; h [" P5 L% D
usbcore: registered new device driver usb0 e) ]; j- T' @3 C( _% J! r, U
clocksource: Switched to clocksource arch_sys_counter
6 n6 Y3 M+ {2 v7 X; HVFS: Disk quotas dquot_6.6.0
$ E1 W+ n8 l7 _# q% @$ [VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
& g9 |, E* ]; @3 Kzx_gpio 10d10000.gpio: ZX GPIO chip registered' P$ P: B8 }6 P
vid is [0]) b5 C* \: z9 y; [/ _
zx_gpio 10d10040.gpio: ZX GPIO chip registered
* T2 f5 M4 M6 U4 F1 ~% ~vid is [0]
; J$ f+ |2 J; q% Qzx_gpio 10d10080.gpio: ZX GPIO chip registered
' H1 q$ X+ m2 J4 D5 p5 L* e/ wvid is [2]) S; y/ y; ^$ d" ^( n
zx_gpio 10d100c0.gpio: ZX GPIO chip registered
i" J" M) S$ _* kvid is [2]
: O4 E2 k( h( @. N# {6 F1 _zx_gpio 10d10100.gpio: ZX GPIO chip registered
( b2 t+ o6 \: n. Q' l+ ovid is [2]
" y) n2 b: |9 e2 w1 y- X, P% h9 H# PNET: Registered protocol family 2& X4 [ Y) Y0 T5 N# Y+ h0 c, S5 v
tcp_listen_portaddr_hash hash table entries: 256 (order: 0, 4096 bytes), ?) C6 Z! h4 ]6 J5 a; \
TCP established hash table entries: 4096 (order: 3, 32768 bytes)
9 R7 V8 ?/ D) H" {4 [* qTCP bind hash table entries: 4096 (order: 4, 65536 bytes)9 c W* Z+ x2 V3 t7 n7 n
TCP: Hash tables configured (established 4096 bind 4096)
V F- b/ Z" x) i) l% J8 T- cUDP hash table entries: 256 (order: 1, 8192 bytes)' U# E' p: R; @) N9 D9 T* i. K
UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)- ]. @! E0 @* A s0 M- @7 W
NET: Registered protocol family 1
0 v( c$ |1 Q6 z0 J( lTrying to unpack rootfs image as initramfs...6 N5 w" F! N: I W
Freeing initrd memory: 16420K
! y+ m9 }7 `3 F# {0 r" B$ T1 fInitialise system trusted keyrings
4 ^- n4 D s& B+ Y. x4 jworkingset: timestamp_bits=46 max_order=17 bucket_order=0
2 t/ y, }( e! C2 {exFAT: Version 1.2.9. K. J8 j( A! S& j0 N
Key type asymmetric registered' L* z u# e; L/ X; S z+ G% F& R: k
Asymmetric key parser 'x509' registered: p% y2 @5 r. Z2 E1 Z% s
io scheduler noop registered3 ?% Z2 T- w; H( I: Z& T
io scheduler deadline registered
/ X7 E: d. S1 J. }0 \2 V0 zio scheduler cfq registered (default)' o, e2 n6 x8 A; m8 j' e
io scheduler mq-deadline registered( e! V( U; O& o4 Z
io scheduler kyber registered
7 h7 h; ^, B* f# q; D! [4 Jinterval tree insert/remove
6 s$ y$ C3 g8 \% v* ]# m -> 884 cycles
/ n2 B' V7 B1 F: r1 ]+ Hinterval tree search
. s' Q6 J5 B3 c( q2 h -> 5278 cycles (2692 results)
6 r$ R, C5 ~( |2 d( Z9 i2 ^, @. |zx_spi_probe: enter
# s5 C3 {& }8 A2 W: Zzx_spi 14f06000.ssp: Failed to request TX DMA channel
! X/ `# @$ F4 C1 wzx_spi 14f06000.ssp: Failed to request RX DMA channel3 b5 M3 b7 M+ ]
spi spi0.0: zx_spi_setup: mode 0, 8 bpw, 500000 hz
% j6 i' W, u8 e# u0 v5 t7 szx_spi 14f06000.ssp: set rate to 961539
3 a8 S7 Y7 m' Z0 L) vzx_sfc_probe: enter+ _5 m! |$ w. e7 D) P% b! f
zx-spifc 10d0f000.spifc: spifc rate is set to 125000000
% U2 W- x* M5 `6 t" fzx_mdio 14f01000.mdio: mdio not set pins
. d g _( `9 xzx_mdio 14f01000.mdio: Cannot found phy-power property in mdio8 o3 h# P" _$ F: e1 Q) N
zx_mdio 14f01000.mdio: MDIO id = 0, clock = 2500000$ z- v+ }9 h* \/ @ T2 f A
zx_mdio 14f01000.mdio: MDIO probe success!" Q6 e f. f# D# h" s! ~
zx_mdio 14f02000.mdio: MDIO id = 1, clock = 2500000. @9 n2 H( o6 a( [" n& a
zx_mdio 14f02000.mdio: MDIO probe success!7 _; M P% v, @9 L
zx_i2c 14f03000.i2c: zx_i2c_probe
- p6 U& ~% }. m8 ] J2 y<drivers/soc/../../../../../component/linux/common/i2c/i2c_zx.c> before i2c_add_ numbered_adapter i2c->adap.nr is -1) B2 @7 b# o4 X" b0 E' F
<drivers/soc/../../../../../component/linux/common/i2c/i2c_zx.c> adapter_id is 0, l# c# `* W- W7 { J V( d
<drivers/soc/../../../../../component/linux/common/i2c/i2c_zx.c> after i2c_add_n umbered_adapter i2c->adap.nr is 0
6 W* B# a5 _ }4 [zx_i2c 14f03000.i2c: clock rate is 25000000" j: m' F1 W* b7 B* |. G
zx_i2c 14f03000.i2c: zx i2c0 probe succeed.
5 c1 L7 o- ?6 o2 S0 o6 G vtdm registered!" w: ?: ]6 y/ N* q
zx_tdm2.0_probe!
) _0 Q6 s0 l' |0 l% v1 h* eg_tdm_buf =(____ptrval____),9f138000
' F( Z& P" o( @tdm irq=28
* ]) a9 z9 [# W7 D8 D* M& X& X/ d; Mtdm binding cpu1.... b9 Y+ P' u% |% K
tdm softirq
% B% _5 R% Z5 lzx_axi_tdm_setup3 ~6 x, r$ I' O- h! t- D
zx-pwm 14f10000.pwm: zx_pwm_probe done.
$ ?5 @& b8 ?- J6 z+ fzte,zx27913x-pcie 15200000.pcie: zx pcie probe enter!!!!!!: }7 O. }' K( R3 s1 E7 D4 s
zte,zx27913x-pcie 15200000.pcie: Link down work initialization completed7 L7 `. i. s7 {
pcie@15200000:Initialize pcie's phy!!!
" K5 l, v: @1 e* Z9 Npcie@15202000:Initialize pcie's phy!!!5 z/ i3 ^! o* l
random: fast init done# S, U' g, O* h, W% M7 ] a
zte,zx27913x-pcie 15200000.pcie: host bridge /soc/pcie@15200000 ranges:: @3 o8 o% ?( J5 b7 \2 e& C
zte,zx27913x-pcie 15200000.pcie: IO 0x2f000000..0x2f0fffff -> 0x2f000000 \5 X: v3 A* F/ l& Q+ R
zte,zx27913x-pcie 15200000.pcie: MEM 0x20000000..0x2effffff -> 0x20000000( G6 p3 s8 r* K* r& g2 o1 @
zte,zx27913x-pcie 15200000.pcie: dbi_base = 0xffffff8008e25108 link up val = 0x 51
- i* ?+ j" k$ i: u8 F3 E4 I8 Hzte,zx27913x-pcie 15200000.pcie: Link up, speed reg = 0xb0120000
' d- _$ o$ Y: I5 H# nzte,zx27913x-pcie 15200000.pcie: PCI host bridge to bus 0000:00
6 h5 P5 H* h) ~% q: D. Lpci_bus 0000:00: root bus resource [bus 00-ff]" r9 h8 h6 a+ u1 _
pci_bus 0000:00: root bus resource [io 0x0000-0xfffff] (bus address [0x2f000000 -0x2f0fffff])
" {. e7 ]" W/ \6 D+ j6 z; kpci_bus 0000:00: root bus resource [mem 0x20000000-0x2effffff]
/ Q+ z4 E( O* m V8 H: E4 Czte,zx27913x-pcie 15200000.pcie: enable MSI ok
2 f9 a+ M' R u2 Rpci 0000:00:00.0: BAR 0: assigned [mem 0x20000000-0x200fffff]/ @7 x) k) U! x8 c+ T2 e1 z
pci 0000:00:00.0: BAR 8: assigned [mem 0x20100000-0x201fffff]
) z# q3 L9 _5 Gpci 0000:00:00.0: BAR 9: assigned [mem 0x20200000-0x203fffff 64bit pref]" x1 ~, n1 V' j1 K
pci 0000:01:00.0: BAR 0: assigned [mem 0x20200000-0x202fffff 64bit pref]
4 Z' @% F+ P/ ?0 Q( [$ _5 Bpci 0000:01:00.0: BAR 2: assigned [mem 0x20100000-0x20107fff 64bit]
4 H: B, H w# A; L: _% J, r$ Xpci 0000:01:00.0: BAR 4: assigned [mem 0x20300000-0x20300fff 64bit pref]% W5 d9 G# g# [" r
pci 0000:00:00.0: PCI bridge to [bus 01-ff]
' I1 u9 P' G, t2 u; s1 S: |) ipci 0000:00:00.0: bridge window [mem 0x20100000-0x201fffff], I- F2 A9 b: ~ K, l! @
pci 0000:00:00.0: bridge window [mem 0x20200000-0x203fffff 64bit pref]
6 \" ~7 |8 a/ ]- Ypcieport 0000:00:00.0: Signaling PME with IRQ 32
- K2 @ m& X# p; _% x4 W1 X( Opcieport 0000:00:00.0: AER enabled with IRQ 325 U* ^/ {# W; V* ?' Q+ ^
zte,zx27913x-pcie 15200000.pcie: Request pcie link down irq [25] ok6 Y G7 n. W# R! `
zte,zx27913x-pcie 15202000.pcie: zx pcie probe enter!!!!!!
) O: E- d) g1 a3 W) yzte,zx27913x-pcie 15202000.pcie: Link down work initialization completed
b/ W* z& g; ]" F% p8 _pcie phy has been initialized !!!!!!
; O, {8 J$ V0 ]- S0 kzte,zx27913x-pcie 15202000.pcie: host bridge /soc/pcie@15202000 ranges:3 Q1 m/ k. } c
zte,zx27913x-pcie 15202000.pcie: IO 0x3f000000..0x3f0fffff -> 0x3f000000
. d8 s v+ ^- A$ E7 D) ~zte,zx27913x-pcie 15202000.pcie: MEM 0x30000000..0x3effffff -> 0x30000000/ l8 J* T* j$ s) v2 ?3 O0 L
zte,zx27913x-pcie 15202000.pcie: dbi_base = 0xffffff8008f33108 link up val = 0x 51
7 X+ x0 V8 q5 r- W2 kzte,zx27913x-pcie 15202000.pcie: Link up, speed reg = 0xb0120000
9 g+ t7 X8 I$ l$ a* _4 u, Rzte,zx27913x-pcie 15202000.pcie: PCI host bridge to bus 0001:00' Z3 K% ?6 j& v* D+ t/ `2 u! [
pci_bus 0001:00: root bus resource [bus 00-ff]8 o6 A; A0 g' X" {5 G
pci_bus 0001:00: root bus resource [io 0x100000-0x1fffff] (bus address [0x3f000 000-0x3f0fffff])- j4 X* E. Q& O9 L3 {; }
pci_bus 0001:00: root bus resource [mem 0x30000000-0x3effffff]% {2 P: k4 w6 P. {( V4 L/ i
pci 0001:01:00.0: 4.000 Gb/s available PCIe bandwidth, limited by 5 GT/s x1 link at 0001:00:00.0 (capable of 8.000 Gb/s with 5 GT/s x2 link)8 h! S0 O2 t6 g# M
zte,zx27913x-pcie 15202000.pcie: enable MSI ok
: A1 B1 b9 Z0 Y# v/ ]7 {pci 0001:00:00.0: BAR 0: assigned [mem 0x30000000-0x300fffff]8 _' s& K r8 ?
pci 0001:00:00.0: BAR 8: assigned [mem 0x30100000-0x301fffff]' X! Q8 |- F9 D
pci 0001:00:00.0: BAR 9: assigned [mem 0x30200000-0x303fffff 64bit pref]8 u% z4 T+ m$ M- \
pci 0001:01:00.0: BAR 0: assigned [mem 0x30200000-0x302fffff 64bit pref]* D# d& [) T! h* W& V8 e
pci 0001:01:00.0: BAR 2: assigned [mem 0x30100000-0x30107fff 64bit]9 _( k! f( A" f- p- k
pci 0001:01:00.0: BAR 4: assigned [mem 0x30300000-0x30300fff 64bit pref]
: D" R+ e2 c, ~; tpci 0001:00:00.0: PCI bridge to [bus 01-ff]
: T; n/ X( P% @$ _& M" f6 S; D8 zpci 0001:00:00.0: bridge window [mem 0x30100000-0x301fffff]$ [3 a3 Q+ G7 @1 O0 m8 @' b( X
pci 0001:00:00.0: bridge window [mem 0x30200000-0x303fffff 64bit pref]
# L8 Y( c/ @" G8 c" k! epcieport 0001:00:00.0: Signaling PME with IRQ 34
: o) F0 C. i/ Y! y# Q& Xpcieport 0001:00:00.0: AER enabled with IRQ 34
% S+ P6 i& t5 b' ]7 mzte,zx27913x-pcie 15202000.pcie: Request pcie link down irq [26] ok& K" m. W( o/ t. v& n9 ]1 L o2 J
zx_pvt_sensor_cln22ulp 10e70000.pvt: Enabled with temp 0x11e
# t) q7 C: m2 F6 F lzx_thermal_init end
5 {" T3 G1 j! ^& a& o0 n& vzx_pvt_sensor_cln22ulp 10e70000.pvt: probe ok, clock rate: 1190477
$ C3 q* j) H8 y: `# e- i<pdt_wdt_init>(485):create proc files for watchdog!!!
( i2 M9 M; D+ `8 Q) {" t<pdt_wdt_init>(490):Starting Watchdog Timer...) e# b3 w- r& _4 | P% [& a
wdt debug: nr_cpu_ids= 2
1 Q4 K# Y* W2 Q( e( ^zx_wdt 14f09000.wdt: zxwdt[0]: heartbeat 8 sec, clock 2048( T7 V6 G; ~) }
<pdt_wdt_init>(490):Starting Watchdog Timer...6 e, J9 V- `# E* ?% N8 M
wdt debug: nr_cpu_ids= 2
* |1 d: p% I; U3 l% Ezx_wdt 14f0a000.wdt: zxwdt[1]: heartbeat 8 sec, clock 20483 @. R( w& S/ F( Y
<pdt_wdt_init>(490):Starting Watchdog Timer...' V* g, u8 F. a1 D
wdt debug: nr_cpu_ids= 26 _# j& L- U, H1 O, B- }( e- A
zx_wdt 14f0b000.wdt: zxwdt[2]: heartbeat 8 sec, clock 2048% S, `7 m" o9 K: [( J* L9 \7 e) o
<pdt_wdt_init>(490):Starting Watchdog Timer...
$ o7 V) ?4 y' A8 `1 l( W+ ~wdt debug: nr_cpu_ids= 25 f* G/ N' j% X4 h9 Q
zx_wdt 14f0c000.wdt: zxwdt[3]: heartbeat 8 sec, clock 2048
' h* @, [. R9 d- `, F( G- x" \success to get board info" q! E0 C( W$ w8 s
success to get cpu info
9 V4 I' I2 y# N) {2 Dsuccess to get port info
# q% H, m: X5 E& z0 [success to get enet info$ b5 w1 i. |# ^7 B5 b2 ^
success to get optical info5 z+ T$ h7 m! W( B! U
zx_board soc:bdinfo@0: Property 'pots_info' cannot be read, ret: -22.
: x& i9 ?- W8 G% P8 C# I$ ?* ?1 _; S% rsuccess to get pots info7 d2 k' Y; e/ |6 B8 t( N% G
success to get ge info
; T# r: N- }, B0 p' U, a& zthe count of outerphy_desc is 3!
" m- e. O5 I. {) C5 F! nthe outerphy_mode of outerphy_desc: 0!
. X% s: b* c! Y \9 d2 R5 Zphy_name:[]_[0]
8 g1 L% O; r8 C/ u c( bthe outerphy_mode of outerphy_desc: 0!. `) p3 e" c# j
phy_name:[phy_RTL8226]_[1]* L: h" b! U. I
the outerphy_mode of outerphy_desc: 0!9 {$ v- B, g1 C* |# S
phy_name:[]_[2]
8 ~2 j% m: w' Z& vsuccess to get outerphy desc info/ X, u& D% R" {% H8 o; J, N8 d" m* |
zx_board soc:bdinfo@0: vid: 2, name: TDY09, zx board probe ok.
/ J% S" F3 f, ]2 ~% gsuccess to get board info1 s+ {9 X5 s8 q [1 k4 G" \
success to get cpu info
' N7 X+ M. I7 Nsuccess to get port info
# _; z, v5 m: `8 x' p# b$ Dzx_board soc:tdy0a_4@0: Property 'vid_list' cannot be read, ret: -22.. j3 ]2 v$ ^) A+ @7 @
success to get enet info5 F, R Q5 G( h5 B# k1 F4 v; ]4 |
success to get optical info
3 l4 a4 F8 S4 m- N7 \; Kzx_board soc:tdy0a_4@0: Property 'pots_info' cannot be read, ret: -22.
( D M' C" P* E$ E+ Zsuccess to get pots info
, |9 y* C/ D$ Gsuccess to get ge info
! r5 j6 Y" Q% w, z1 jthe count of outerphy_desc is 3!
5 P7 q r1 g+ g3 e" T5 M0 Wthe outerphy_mode of outerphy_desc: 0!
& F {. A$ L, j% L1 hphy_name:[]_[0]: Y4 X V! u4 J+ o3 Z
the outerphy_mode of outerphy_desc: 0!
" @/ B1 l C5 Dphy_name:[]_[1]
% O+ E' e: V5 b# K0 [/ K" Bthe outerphy_mode of outerphy_desc: 0!7 s' g L$ N7 V. A. f" g
phy_name:[]_[2]; `( W% G* W* g4 l6 o
success to get outerphy desc info) u3 C6 E$ w6 Q& z* `
vid unmatch! try next DTS. ^3 I# W. \( I0 o* {. E4 ?" d, `
success to get board info- j0 X1 B3 ?: H$ i- D! d
success to get cpu info# }' q+ i: K4 a; v! r% S Q
success to get port info! B& r3 ^& c9 n% H$ U
zx_board soc:tdy0a_5@0: Property 'vid_list' cannot be read, ret: -22.; z% x, E4 P8 v& [+ E9 l
success to get enet info
" Y! @" L8 h, }6 V, usuccess to get optical info
8 G# l6 F! K* Y1 s6 G! q+ szx_board soc:tdy0a_5@0: Property 'pots_info' cannot be read, ret: -22.1 [* D5 a3 [' f* D0 l1 V8 Y: B+ @
success to get pots info. ]1 }/ b, x$ G
success to get ge info& z {5 c y4 G8 D, e- F$ _; u2 ?
the count of outerphy_desc is 3!8 Y: Q* X3 s9 H% v: m9 y0 I! u
the outerphy_mode of outerphy_desc: 0!
) }3 v( a! k9 { D, e5 Aphy_name:[]_[0]
2 @5 h j( B. Z* U8 Ethe outerphy_mode of outerphy_desc: 0!
' I' L3 l1 B# A$ F$ Iphy_name:[phy_RTL8226]_[1]
/ g" E8 E/ f5 ^* f6 C# w5 {4 Xthe outerphy_mode of outerphy_desc: 0!
5 y* Q& j* k6 o6 `9 nphy_name:[]_[2]6 s5 B7 E4 [2 `* a
success to get outerphy desc info
: e; R$ d' h) i$ Y% `! V5 c, yvid unmatch! try next DTS$ o: h* C0 `$ m; Q. f3 T4 _: v8 N
success to get board info0 l7 Q( w4 ^ l* |! f
success to get cpu info( f: o+ v( P$ S
success to get port info1 T) F ]" Z& m! l# Y7 g7 \9 ]
zx_board soc:tdy09_0@0: Property 'vid_list' cannot be read, ret: -22.
6 K- Z# A7 S( f. Y$ E" Lsuccess to get enet info
% z# _. _; e7 L+ T7 b" ~& i, E# Hsuccess to get optical info* j9 ]1 ]( M+ \& y; `
zx_board soc:tdy09_0@0: Property 'pots_info' cannot be read, ret: -22.9 {( s( K2 O+ z. x! F& \5 Y# y
success to get pots info$ N1 \+ |4 @# v) j1 [, C) | Z/ ^
success to get ge info: J$ X+ C0 G; g# B& k3 ?. Y4 M
the count of outerphy_desc is 3!' P. I0 h+ V. l( c
the outerphy_mode of outerphy_desc: 0!% i& Q) o- e" s+ |
phy_name:[]_[0]9 @6 I% e+ L, v9 r4 O+ e# k
the outerphy_mode of outerphy_desc: 0!( t3 L* ]0 |' h E7 `2 m
phy_name:[]_[1]
* ~8 t# F' R+ l3 T/ Ithe outerphy_mode of outerphy_desc: 0!( {3 r9 M( {) u
phy_name:[]_[2]
! ^2 v, q. `" [; Wsuccess to get outerphy desc info
- k) ~/ b9 n2 j% U+ o5 G \8 Cvid unmatch! try next DTS
: U. v p* Q; L1 g# \# e7 E$ Psuccess to get board info
3 Y1 k: v; f' M8 X% t4 g5 I |success to get cpu info
$ _3 v: \* l+ r; Y2 lsuccess to get port info
Y3 i) L% j! w% c9 jzx_board soc:tdy09_1@0: Property 'vid_list' cannot be read, ret: -22.
! U1 X2 T. Z, Q# }7 a$ a- e% Dsuccess to get enet info; H# M# h, A/ ^& y
success to get optical info* Y8 N6 h5 n ?# j1 S5 I
zx_board soc:tdy09_1@0: Property 'pots_info' cannot be read, ret: -22.
- H! A' f L3 L# ^success to get pots info ?6 e( V, I& o* _
success to get ge info
* d$ y- g: V) l. |7 l* Zthe count of outerphy_desc is 3!
& v' X" v( }( S* D; N8 Y+ Y( Lthe outerphy_mode of outerphy_desc: 0!
) b! h3 \. M: {6 vphy_name:[]_[0]& d5 O( p% `" j
the outerphy_mode of outerphy_desc: 0!) s- k& a7 Y9 R5 }0 H7 {/ m
phy_name:[]_[1]
: y* g! V: H9 \+ k7 K) m; X* Ethe outerphy_mode of outerphy_desc: 0!4 X9 [3 z, j% c/ Z3 u0 h$ c1 e
phy_name:[]_[2]
0 J' a0 Z1 B3 p" _* E. \5 S& o* _success to get outerphy desc info1 P# N5 V# d& v G% ]
vid unmatch! try next DTS9 K' Y* ~' W, ^2 T2 }( \, N2 t
zx_board soc:tfy01_7@0: Property 'board_info' cannot be read, ret: -22.
" y5 |3 s" |4 c2 l1 Y R! e6 `zx_board soc:tfy01_7@0: failed to get board info
* V2 f) E. s) i7 P5 X6 J7 w$ kcpufreq_zx: zx_cpufreq_driver_init4 B" H6 @9 U q l; c* @1 u7 G
leds DTS probe by vid, successed
* _$ X! Z0 _( `2 `. |( S; J7 k1 Nzx-leds-gpio soc:leds_2: 4 led has mux ctrl
+ W& m3 a2 G+ L z0 izx-leds-gpio soc:leds_2: alloc devid 101711872
7 u' U3 L2 i) e! S: xpon_plat_probe begin...
/ w7 V" H* S1 H[init_pon_plat_np_rsv_mem_cfg] temp_pon_plat_need_rsv_mem= 0x3245000
' {: D" T- V/ {" y* W[init_pon_plat_np_rsv_mem_cfg] get g_red_cw_in_share_max error! default val is - 1
+ h( j# Z4 L$ l8 O[pon_plat_get_rsv_mem_cfg] total_pon_plat_need_rsv_mem=0x32450006 N: x1 L1 o: n, t' D) A- H7 n
[pon_gpio_init] Failed to get optical rxsd signal4 U6 _% J. W0 x$ i2 C
[pon_gpio_init] Failed to get rtl8367s reset gpio signal
: C1 z% m; q# U' u[tm_acl_max_item_init] g_tm_max_fast_num=0, g_tm_max_fast_num_v6=0, g_tm_max_fas t_num_l3=0 `# j! X# ?1 Z: G8 R2 u; L6 R
[tm_acl_max_item_init] g_tm_max_opc_flow_num=05 a- g2 S% o' e$ T
[zxic_e8_en_init] g_zxic_e8_en is set to 0
. m* a% A; s: c: f. b& O7 l2 @[zxic_e8_en_init] g_zxic_e8_en is 0( m- [+ {: {# U& `' Q
[up_mode_global_init] g_epon_open_high=1 use default!0 `/ g1 h0 Z1 x9 @3 p
[up_mode_global_init] g_epon_open_high=13 [- `( w" w1 e3 V- K( b# Z( E
[up_mode_global_init] bosa_and_switch_ponmode_info=0x5200040,g_switch_ponmode=0x 40,g_kernel_switch_en=0x0,g_multi_bosa_en=0x0,g_bosa_type=0x2,g_switch_time=60$ v% f; a$ q% X5 ]6 _
[zx_set_upmode_info] g_UpModeInfo=0x40 g_up_mode=0x40 g_is_auto_ponmode=0 g_lanu p_port=0 g_wlanup_port=0 g_wan_port=0
+ `& G* y7 i2 u9 ` F7 h, h0 f5 V5 M[switch_chip_type_init] switch_chip_type is set to 0
+ q% e4 S' p: p& L6 t5 P- P \[mdio_8226_id_get] mdio_8226_id is set to 1
" A5 z- U% W7 |3 p+ l+ q[mdio_8367s_id_get] mdio_8367s_id is set to 0
1 e8 r. }( k, }0 S; [) h; hcurrent_wlan_map is TYPE_133_8SSID.
( R* d- q* |4 s, m6 fpon_plat_probe end...
+ m6 w0 E; J. }# y$ w) ncacheinfo: Unable to detect cache hierarchy for CPU 0
; J5 ^, h5 p: X& ^brd: module loaded
' _+ E$ D5 t( i$ Wloop: module loaded. X, \% Z4 a, X2 V G$ @
SCSI Media Changer driver v0.25
) \4 X7 b( Q. L: w: ispi-nand spi1.0: ID efaa2200, Winbond SPI NAND was found.: r1 U0 F0 ]! }+ _# G
spi-nand spi1.0: 256 MiB, block size: 128 KiB, page size: 2048, OOB size: 128' D9 ]4 O+ L9 `& B: F2 s
dynamic partitions parse' Z R5 `( V8 Q$ _2 b
Found 256MiB: 256MiB1 t' E. U+ K$ |' P" g
15 dynamic-partitions partitions found on MTD device spi1.05 n" [# e7 f b( j* S
Creating 15 MTD partitions on "spi1.0":( P: R8 ^- M# V3 r+ s
0x000000000000-0x000010000000 : "whole"0 @+ i8 A+ P l7 r6 [
random: crng init done8 Q" q* x4 Z; r+ w' N
0x000000000000-0x000000200000 : "boot"
& ~) p* y6 k' }) u# u0x000004800000-0x000004c00000 : "parameter tags"
( v! ~* l4 d1 {6 ]0x000000200000-0x000002200000 : "kernel0"
6 ?0 L- i" }- _0x000005400000-0x000005800000 : "middleware"$ M9 z* Q; M& z; d
0x000004c00000-0x000005400000 : "usercfg"9 G0 s) ` t' g% d, c
0x000002200000-0x000004200000 : "kernel1"9 k0 `3 ]/ R* ^+ @! }
0x000004200000-0x000004800000 : "others"- G$ u! S2 |5 c. G1 A
0x000005800000-0x000005c00000 : "wlan"
4 @! }5 w3 n6 g0x000005c00000-0x000005e00000 : "phoneapp0"& o- ]! V# Q- _2 L( r. X. f
0x000006000000-0x000007e00000 : "osgi0"* P2 n8 S! t+ N; _2 ^7 z2 w# }
0x000009c00000-0x00000fc00000 : "plugin_data"
9 E( y' ]- o( S' X0x000007e00000-0x000009c00000 : "osgi1"8 a: t+ L" p4 [, B* X0 D5 L }
0x000005e00000-0x000006000000 : "phoneapp1"5 {) f1 j. h' w% b p7 G+ L4 h* X
0x00000fc00000-0x000010000000 : "awifi"1 i5 F- n8 @' E7 _/ @7 j
libphy: Fixed MDIO Bus: probed- a! ^* O1 W, a9 I( G6 U
tun: Universal TUN/TAP device driver, 1.6
4 c1 N4 Z( m: C# c0 r6 l: c# Xthunder_xcv, ver 1.0
4 _) _0 w8 i2 o2 p4 _thunder_bgx, ver 1.0 n. B4 t: Y- e
nicpf, ver 1.09 t; o& o7 o4 Z4 D- M6 f$ l+ f
PPP MPPE Compression module registered
9 h3 X5 P2 N0 M# Q4 iNET: Registered protocol family 24
- Z2 N+ L; f" b N$ s9 K. o+ Xxhci-hcd 15008000.usb3: xHCI Host Controller
% v/ k4 A1 s C$ q$ r, ?5 pxhci-hcd 15008000.usb3: new USB bus registered, assigned bus number 1
+ p' G; n+ i8 y# [3 h: ]& Zxhci-hcd 15008000.usb3: irq 22, io mem 0x15008000
H# Z& ?4 u4 o9 U/ \usb usb1: New USB device found, idVendor=1d6b, idProduct=0002, bcdDevice= 4.19
: n6 Y& R: N/ ]$ J1 Rusb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=17 L7 r3 C1 `4 f8 L" J
usb usb1: Product: xHCI Host Controller! `2 H! J1 c7 n# N
usb usb1: Manufacturer: Linux 4.19.136+ xhci-hcd
D. y, ~+ [" ?$ @* p3 J5 \usb usb1: SerialNumber: 15008000.usb3
$ G: V6 ^+ F; r- T/ Z/ dhub 1-0:1.0: USB hub found3 Q* {$ R9 ?; _% O& ]
hub 1-0:1.0: 1 port detected
+ M' L. @+ }5 Lxhci-hcd 15008000.usb3: xHCI Host Controller
2 }' _& a$ ?$ F5 [ lxhci-hcd 15008000.usb3: new USB bus registered, assigned bus number 2
% w, r1 c8 @: y4 r dxhci-hcd 15008000.usb3: Host supports USB 3.1 Enhanced SuperSpeed
, V& d+ n' E5 ^usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
" C) t1 y3 l& Eusb usb2: New USB device found, idVendor=1d6b, idProduct=0003, bcdDevice= 4.19
D, Z5 D- k3 o: Kusb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
2 ~$ N+ F( V. K; |) q2 Eusb usb2: Product: xHCI Host Controller
' Y2 `' G# P3 \2 X$ C/ v7 F7 Rusb usb2: Manufacturer: Linux 4.19.136+ xhci-hcd
9 V* T2 z) d7 l8 B; X* J2 V5 p; |usb usb2: SerialNumber: 15008000.usb3) X2 b5 b, _$ S" L3 L4 m8 q4 v8 e
hub 2-0:1.0: USB hub found3 x6 L: M5 `2 Q- \. G& f9 f F, _# [3 t
hub 2-0:1.0: 1 port detected; g: [; w9 M1 R; I9 A
xhci-hcd 15010000.usb3: xHCI Host Controller O, f' c) k* t+ Z/ Q' P2 G' E
xhci-hcd 15010000.usb3: new USB bus registered, assigned bus number 3
: X: `. w: x; b# I/ {8 i) Dxhci-hcd 15010000.usb3: irq 23, io mem 0x150100007 r( S. e1 k" V+ E) C+ t
usb usb3: New USB device found, idVendor=1d6b, idProduct=0002, bcdDevice= 4.190 q) ?1 l' b9 k7 r6 u7 d
usb usb3: New USB device strings: Mfr=3, Product=2, SerialNumber=1
5 L+ k+ `- L8 e- y/ |8 }usb usb3: Product: xHCI Host Controller
' C7 z7 B( V& P4 |3 O; T% A" kusb usb3: Manufacturer: Linux 4.19.136+ xhci-hcd
' b/ ]1 E0 I2 x2 k% m: ]4 Ousb usb3: SerialNumber: 15010000.usb3
8 H4 u4 Y. ?7 f4 ~hub 3-0:1.0: USB hub found
0 A* D# J6 ^# S0 V+ }( I( ~/ hhub 3-0:1.0: 1 port detected
! t6 C4 g% d6 X3 { W# yxhci-hcd 15010000.usb3: xHCI Host Controller
, V. O) p& C7 o; f1 gxhci-hcd 15010000.usb3: new USB bus registered, assigned bus number 48 k$ |( A: _- o, H: k O! J5 { K
xhci-hcd 15010000.usb3: Host supports USB 3.1 Enhanced SuperSpeed
6 F- H1 E" \+ Z& Cusb usb4: We don't know the algorithms for LPM for this host, disabling LPM.
: [. R0 a$ K1 V* \% Lusb usb4: New USB device found, idVendor=1d6b, idProduct=0003, bcdDevice= 4.19
& Y/ h. P- ?* r8 ^- p& d! r) tusb usb4: New USB device strings: Mfr=3, Product=2, SerialNumber=1- |' T( ~9 S& g5 x3 u( g. J
usb usb4: Product: xHCI Host Controller" n" u/ W* M, m
usb usb4: Manufacturer: Linux 4.19.136+ xhci-hcd
- _2 J& \1 |; T+ I' dusb usb4: SerialNumber: 15010000.usb3" f M! U% }, Y- `+ Q* H: L4 U
hub 4-0:1.0: USB hub found, ~, P2 N& L, \+ O
hub 4-0:1.0: 1 port detected. o2 \7 i$ G3 w
usbcore: registered new interface driver usb-storage
* y+ P9 n, s2 V, uusbcore: registered new interface driver usbserial_generic; O* B* G7 i; I* n) _0 e9 V% C
usbserial: USB Serial support registered for generic
9 v2 z+ t3 g9 rusbcore: registered new interface driver cp210x. E2 d3 @$ S" b
usbserial: USB Serial support registered for cp210x. K3 n2 x+ E; c( g0 P( u$ N
usbcore: registered new interface driver pl2303- r0 r2 n' Q" T! _; P U5 O
usbserial: USB Serial support registered for pl2303) m9 g# ]8 k: p4 P2 H, J
i2c /dev entries driver
8 v& K/ u- z, [0 U' au32 classifier
0 C1 S1 M& y! H: rxt_time: kernel timezone is -0000
( k$ ^0 a! ~; Q& x5 Q! V$ _zte--oss cpu usage module init
$ i! O) R; I( V[kernel com_ioctl_dev]:comdev init enter
1 h/ x$ o$ k/ K) v; G[kernel com_ioctl_dev]:comdev init sucess
$ ?" \$ o8 i# O' [( d4 _: }11930:23:06 [Klogstdio][Info] [(886)LogStdioProcInit] LogStdioProcInit w' w+ I: D6 g$ _! S p$ i* b& ~
/ X7 N4 H, m, u( [6 d
LogUdpWatchProcInit' y0 q) j* W- y: Y9 R
detail_process_init start
3 c) J4 c# q1 H3 O/ j3 S: gInitializing XFRM netlink socket% O5 Z9 R% D% H& }7 X9 f
NET: Registered protocol family 10
$ ]! x/ z) l5 tSegment Routing with IPv6
: m1 r6 K" D; {sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver
; I8 q5 l" P8 w( |NET: Registered protocol family 17+ j i, K n- ]+ a2 e" g/ R/ r
NET: Registered protocol family 15
0 c" h* o- ~- ]/ v7 _/ b0 RBridge firewalling registered
& x& M* v2 j) dl2tp_core: L2TP core driver, V2.0
1 h# A& ?6 N' c6 z4 H4 G" u' Il2tp_ppp: PPPoL2TP kernel driver, V2.0) I% [+ c% v' B* k+ p( L* B% ~
8021q: 802.1Q VLAN Support v1.8' h1 J8 S% }( ~: j
Key type dns_resolver registered6 l5 Z4 w4 c v7 ^4 h" u. u: Y
Loading compiled-in X.509 certificates
1 S% X( x Y9 [7 dLoaded X.509 cert 'Build time autogenerated kernel key: bd6a5cb9563a2184cd950e56 662eabd273edf53e'
% I( _; d* b4 w; j8 T8 OKey type encrypted registered
6 s. V5 h- M' ]- V1 _2 i" yzx_gpio_keys: zx gpio keys probe
2 y, f& F2 M: f/ Nkeys DTS probe by vid, successed
3 X+ R2 H7 `( z5 ?input: soc:keys as /devices/platform/soc/soc:keys/input/input0
8 q* N9 V8 G) B2 ^4 {8 }br_uc_ffe_init registered melon @
4 L" v, }9 B; n! b3 W1 aQOSBw module init+ J& M7 @5 G/ \! L/ q0 R0 I: Z3 R
% h4 k. t8 a, f4 a3 Z0 I- ~8 C' e
==========zxic_notifier_init success=================
& m& B, |: m/ Q0 l2 u. p+ @9 Tmultivlan cache ini# D% S2 V. D2 [% G$ q5 [6 }6 O5 \5 A
br_multivlan_init registered melon @
8 w) j8 F+ z& r% f" M2 Nbr_vlantci_init registered melon @
+ X- i3 a0 C' ]% T' e' lFreeing unused kernel memory: 640K7 `# r5 n" S3 I( `
Run /sbin/init as init process
: E1 e# e9 {- K( [dmounting /dev/mtdblock2 to /tagparam, wait ...$ H" S) ^, c+ D1 x% [2 ]8 n
jffs2: jffs2_scan_inode_node(): CRC failed on node at 0x003437c8: Read 0xfffffff f, calculated 0xf3a43fef
) P7 I1 T) _5 A* B: K0 {8 y; l/ yjffs2: Empty flash at 0x0034383c ends at 0x00344000
' a Y. [& x9 ], z% }' `# K5 i4 fjffs2: jffs2_scan_inode_node(): CRC failed on node at 0x003447c8: Read 0xfffffff f, calculated 0x58b84118
+ M- M$ l2 P1 |5 e* B( _& r; Ejffs2: Empty flash at 0x0034483c ends at 0x00345000
/ [% g, m8 z8 P! z: g# gjffs2: jffs2_scan_inode_node(): CRC failed on node at 0x003487c8: Read 0xfffffff f, calculated 0xbec1c4c6
( x( M G2 D1 Pjffs2: Empty flash at 0x0034883c ends at 0x00349000
: F& U( D8 [0 [% [1 {; G7 F S ~jffs2: Empty flash at 0x00349928 ends at 0x0034a000/ Z4 x& [+ I7 b d$ V, R d& ~ n
djffs2: Empty flash at 0x003c0830 ends at 0x003c1000
0 Q6 U$ W8 k1 u; Z) I. u' a& Rjffs2: jffs2_scan_inode_node(): CRC failed on node at 0x003c17c8: Read 0xfffffff f, calculated 0x84bace03; M# c8 f0 \% u9 n6 X s6 g. X3 N
Mounting ramdisk at /var and /usr/cpkTmp
+ l6 x* x1 r+ s9 g$ W) c. r mounting /dev/mtdblock4 middleware to /important_bak, wait ..." `/ P/ J* j5 ^1 ^6 }; E6 R1 @- m% f
jffs2: Empty flash at 0x00008948 ends at 0x000090008 H0 c/ ?) u) s; j8 B% P
jffs2: Empty flash at 0x0000a344 ends at 0x0000a800/ h% `9 l- u8 O" f6 Q
d Mounting /dev/mtdblock5 to /userconfig T% U# [$ U. t1 P, R9 T7 y1 a% K
jffs2: Empty flash at 0x0011b360 ends at 0x0011b8005 y* [5 \0 [- Y( h
jffs2: Empty flash at 0x0011d240 ends at 0x0011d800
* i3 m I, Q! G5 [6 ^' R; ujffs2: Empty flash at 0x007795f4 ends at 0x00779800# O7 o/ H5 r, E
Mount ok!
9 K X3 n9 ?& T* d u6 zd--------------- otarget is 0 ---------------
* A& U; Q8 A) Y4 X- D************************** mout mtdblock10 *********************
& p. }, q4 } Z+ j+ F- ~ddddjffs2: notice: (924) check_node_data: wrong data CRC in data node at 0x0011e fac: read 0x43c5ce84, calculated 0xbbb11b8d.+ P+ E( h! p8 a! Y2 n8 O! }
d8 z$ S1 r V, ~ Z
jffs2: notice: (924) check_node_data: wrong data CRC in data node at 0x0011cd98: read 0xeb8464b5, calculated 0x4221e37b.* R6 g! b9 F6 e S( r1 \7 j
ddd
( g/ o6 ^6 s/ t. |" X8 f! M K' ]d/ y/ Q$ V; Z9 `* z6 J. f
11930:23:10 [U_sk_test][Warn] [mtduserapi.c(694)GetPrivateProfi] start pKeyName= factoryrestore, value=ffffff01!
; R6 z7 e. Z; B4 ^" Z' _* a7 ]11930:23:10 [U_sk_test][Warn] [mtduserapi.c(807)GetPrivateProfi] end value=0!
# g1 _3 @) u6 h9 P4 edjffs2: Empty flash at 0x02b4ff34 ends at 0x02b500004 Q1 G, H( H+ O, a
jffs2: Empty flash at 0x02b52f18 ends at 0x02b53000% T3 h( b) z1 F, n. F$ R+ T! I
dddjffs2: Empty flash at 0x04b28960 ends at 0x04b29000
8 Q6 S9 |0 Z0 [8 K0 x$ z3 |; k& H! Xdd Mount ok!
) ?3 Z$ K0 W' p0 I& B) C--------------- ptarget is 0 ---------------
; ]1 Y. I3 w: E- c, m3 N5 [, w************************** mout mtdblock9 *********************
, T; E2 C9 g6 W6 Z2 {7 c5 D
. p$ T- [* M0 V2 c3 {* C1 t' Dsismac region_code 307: ~+ D+ M% F% N8 [6 W3 a
sismac region code euqal 307) X5 L! a/ ]- |4 X9 q6 B
11930:23:11 [U_sk_test][Warn] [mtduserapi.c(694)GetPrivateProfi] start pKeyName= skyregioncode, value=ffffff01!
; t& c0 k. d: k7 n: d) S$ Z11930:23:11 [U_sk_test][Warn] [mtduserapi.c(807)GetPrivateProfi] end value=133!5 j/ n" C5 v- M* y6 X8 f
region code euqal 307; U5 W# {, `( }5 B# h
11930:23:11 [U_sk_test][Warn] [mtduserapi.c(694)GetPrivateProfi] start pKeyName= factoryrestore, value=ffffff01!+ F- x% k1 a, p* Y: W& w/ ]
11930:23:11 [U_sk_test][Warn] [mtduserapi.c(807)GetPrivateProfi] end value=0!, u; V- {: G1 }
Mounting /dev/mtdblock14 at /usr/local/awifi
9 A; W, |. y$ V2 v' Y2 Ymount: mounting /dev/mtdblock14 on /usr/local/awifi failed: No such file or dire ctory
% j# W4 q9 y1 ~2 Zidx_bak is not empty [307]2 P6 P0 m( ?9 h
USR_CFG_TYPE_FILE_BAK flag is ok [307]
* e. {/ x, B0 Imounting /dev/mtdblock8 to /wlan, wait ...
5 H% q+ d, ~( `3 e5 r( | _, _djffs2: Empty flash at 0x00143014 ends at 0x00143800! Y' i: K8 Y- u# n- Z3 d) r
Configuring MAC interfaces
7 I) w8 m P9 J& R1 D" jls: /etc/sysconfig/network-scripts/ifcfg-mii*: No such file or directory
6 i/ H% W% k6 z; k9 U9 MBringing up interface lo) \7 w( v0 u: L) R
*****************set bindv6only********************
/ M2 Q4 x2 Z" I ]init_module: umod=0000000048a13e52, len=262712, uargs=000000007b29053c5 y3 }+ v% ~& k- P1 L
bspdriver: loading out-of-tree module taints kernel.4 O4 `: b& S8 W5 P' t. ?* t
bspdriver: module verification failed: signature and/or required key missing - t ainting kernel
( l5 ]4 Y% ^9 Y: b8 ?+ ~; kqupengchao : symname is init_module) @ o F' ^8 Z* J
zx_sec_init( `6 k9 J: h% ]& |
storage_wakeup_proc_create success!9 p" d! w% J' ]% E" W2 p' ?$ K
[bspdriver] uboot cmd_line: U-Boot 2.0.0 20241025183308 0x200000 0x0 0x83 0x83 UpModeInfo=0x00000040 regioncode=0x133' v) O9 g. G9 A# M) S% R5 D0 ~5 q
[bspdriver] bootversion: 2.0.0, bootbuildtime: 2024-10-25 18:33:08
, {6 D* q$ ~# b1 O8 f[bspdriver] kernel offset: 0x200000, active partion: 0
$ E' ^ a! K8 e" j$ q[bspdriver] no sec mode, read mtd.0 M" D$ n" V: I$ S6 ]! _! v) }
s8HardVersion is V2.0
- u' e/ t8 \8 Ns32Description is ZXIC 133 UNI V2.0.0 286632 CM O
& ?5 V! J! D. Q, ps8VendorInfo is ZXIC
% R, \) X1 t: Kds8InnerVersion is CMDV1.0.011: T w5 O/ F9 \0 Z/ Q- |
phoneapp is 2.0.0: K, A5 C* V$ Y: ?- y6 \7 V7 O
zx_vsinfo_init done: q1 S# w) |7 F. R% t* |; ~
zx_vsinfo_probe ret is 0* h1 b K9 H$ H
[DEBUG]zxic_vid_init
$ K* [/ K1 y" H; J& J' K3 J y( Bstart i2c_1 setup.1 P, H; W6 V, I5 C9 r7 h# ?% e
can't get i2c adapter 1
6 C# D% W( H& ^* @6 p# b& ustart i2c_0 setup.
, W2 y8 r! q, o) ginit chip, g_up_mode=0x40. c6 y6 L: w6 Z9 Z, C; w, S- R- T
GN28L95 read table 0xFF chipname-register success,chipname=0xFF.
. n. N- ~2 }8 D4 a) N" k& TUX3360 read table 0x86 register(0x80~0x85) success,chipname=.% l" t2 t" z+ B& i. K4 m4 E2 h6 e8 b
UX3361 read table 0x87 register(0x80~0x85) success,chipname=UX33631.1 ?7 h! L# ^+ S8 J- a. ?
dbsp_mcu_eeprom_mode_select read table register success.
6 Q! B- ] D* @0 Wjudge chip select mcu(0x*0) or eeprom(0x*1) mode ! count=0, judge_reg=0xFF.7 n5 m# r/ X5 B3 K+ _. @
bsp_chip_probe count=0, r_data=0x00." `+ |# [2 m8 y" [, B
UX3361 found., J8 d4 g x' z0 c: P
bspdriver select mode is MCU.4 s" O/ S* Y+ y; [' ~( C
[INFO]zxic_slic_adapter_init init success.- Q, f6 `* Z5 m2 I( z' H* @
sky: slic_spi_bus_id is [0], fpga_spi_bus_id is [0]) a- ~7 ^1 W! j+ B* c6 s
bsp_spi_init can not :spi0.1
' d, |4 @2 [ u J3 ?+ o/ y4 jbsp_spi_init can not :spi0.2
' O; W' X& O5 X* B; k$ qbsp_spi_init can not :spi0.34 d0 p9 O$ P H' @- ]8 n9 |- C
bsp_spi_init can not :spi1.1
4 q/ D- {7 P$ R. b/ Lbsp_spi_init can not :spi1.2+ M$ i8 c# S, b6 ^; `1 K
bsp_spi_init can not :spi1.3' N4 M# t# g; F0 T9 h
=== verify slic info ===7 u4 x; h. L- q7 p% ~0 w: F* |
try mode: 1 `' G3 c. M; d. o% ]5 `
slic mode pcm Z5 H* v8 u5 g% `& `
0x00000008,0x00000008
) d9 S0 \' X2 K" `, l( C4 dzx_axi_tdm_setup" F4 \4 m# d; T2 K! O
zx_axi_tdm_reset,TDM reset ok
# _+ m& q5 t+ M6 ~) s, Afound a port:0 cs:0 ch:01 j0 z- Q1 }9 F$ M# M; d/ x/ V
Lantiq chip dxs found!4 X) Z& v/ F3 b2 u
slic_rst_gpio 6 pull down
: ~6 J6 e4 y* X% hdslic_rst_gpio 6 pull down
8 X1 d$ l# K7 M9 U- {kylin630 chip id error! 0x03 Q ~+ J0 U+ Q W* P
slic_rst_gpio 6 pull down
# Q% W) `7 c1 }9 ~" e0 D S6 USiliconlab chip id error! 0x0
. L. H( ]6 J$ {" N& p/ |slic_rst_gpio 6 pull down% v0 }/ ~$ r9 G, w2 x% C
rcn:0x0 pcn:0x0
$ C9 P5 w" d8 X. E+ h+ T& g8 u5 Ocan't found id.. M1 f4 b& g3 F0 r# j
try mode: 2
# b; ]+ q. `) S! b5 F3 Pslic mode isi
n' o1 r5 V8 ~! P4 \/ Q1 _0x00000009,0x00000009/ U) T* \! z5 `) Z$ i2 L- d6 M
zx_axi_tdm_setup
* ^1 I" j6 C% z _7 e _2 T. B' Jzx_axi_tdm_reset,TDM reset ok
# S% K: P5 ?/ I. M) I+ D4 ddfound a port:0 cs:0 ch:0) n5 K0 y. R1 _ z6 P' T
Lantiq chip dxs found!2 O" T7 c3 R/ B' V5 y$ i
slic_rst_gpio 6 pull down8 A2 W7 @; \# A/ v, h
slic_rst_gpio 6 pull down
y" B; L: x, F, z( k$ Z1 J1 hkylin630 chip id error! 0x08 Y; Z1 e8 j% C0 W6 V) m. p
slic_rst_gpio 6 pull down P0 t/ o* E$ e6 b0 Y% c0 }3 `) v
Siliconlab chip id error! 0x0. K- W D( ^. i. n4 B; P1 N
dslic_rst_gpio 6 pull down
# _0 [% v' n; I, l: O/ Brcn:0x0 pcn:0x0
) [( [# {; F) n2 Acan't found id.
9 f1 y' e, D V! ?try mode: 39 z* c$ d$ }& ^8 E6 u* v
slic mode zsi
4 R5 `1 x# J, `) S' \( X" a0x00000009,0x000000095 l! v6 [/ l0 Q& a
zx_axi_tdm_setup
5 c: H$ ]2 I: A, o5 e$ ^1 |zx_axi_tdm_reset,TDM reset ok$ t1 N% W$ [. Q/ L9 \2 c9 `# [3 n
found a port:0 cs:0 ch:0
' b8 O# T3 e0 uLantiq chip dxs found!0 m) c2 p9 G; J5 m
slic_rst_gpio 6 pull down0 d$ s c# T; r: p0 W
slic_rst_gpio 6 pull down
3 m5 ^) U: J; M+ I; l1 z) Xdkylin630 chip id error! 0xff8 x$ Z/ T2 x5 s' F/ v: u6 ~
slic_rst_gpio 6 pull down+ \" \. o0 K: u) T. ^( O
Siliconlab chip id error! 0xff
1 C) z H; K9 p1 y: ~" X, {5 n<3000000008>11930:23:12 [Klogfile][Error] [(1102)CheckLogConfFile] CheckLogConfF ile%CheckRestartCntConfFile2 C% x3 |9 I% c c8 u
7 Y+ f# A# j5 U% m9 A7 k7 U
slic_rst_gpio 6 pull down
9 q/ }+ |/ N; ?. V9 h1 O& V, _( prcn:0xff pcn:0xff5 @* a0 v+ V0 z ?" \+ G. m
can't found id.
# L6 r- h& A% d# ]- K3 x& rverify_slicinfo ERROR
) m; b' c+ a- Z" I( g0 _siliconlab_line_num: 0, zarlink_line_num: 0, kylin_line_num: 0, total_line_num: 00 C1 x: M$ Q* E0 W: B6 E
kernel_frw1 q2 ]8 Z, V+ C+ _/ ~
read: kernel_frw
: ^- i2 ?1 i, { b$ [! Yread: kernel_frw
0 K* k- s5 k# c! x, txmac0 phy is phy_RTL82269 P0 ?& ^$ V4 V" r& `
init_module: umod=000000006c23bced, len=67864, uargs=000000007b29053c- a% r' R* f1 a3 D- ?, j" N
dqupengchao : symname is init_module
1 ~, N7 a& ]7 C2 j& q! ?! \* [Start insmod R8226b_init! `/ E8 X8 O; m
r8226b_phy_probe: 576: rtl8226b Phy Driver Probe Done L: [' F8 _% z% p0 S
result = 1
* G% j# ?0 s* c; JR8226b init success!0 l2 [0 ] j% f- d# O& r- ]" r
xmac1 phy is
1 d' Q* r. F( mxmac1 no use
4 J% V/ r0 l" {) Hinit_module: umod=000000007b00a603, len=5208864, uargs=000000007b29053c
/ a3 h8 {% \, }6 Z9 c# \3 H1 f. Dnp_133: magic '4.19.136 SMP mod_unload aarch64' should be '4.19.136+ SMP mod_unl oad aarch64'; ^% I* G9 C0 }
dddqupengchao : symname is init_module
- d% l* f, {8 U# iinit plat module
0 R6 O N/ n' W- G, hzx_timer0_probe: ==========zx_timer0_probe>g_timer0_irq=0. N8 S2 X2 E( }* t9 n+ k: x4 G
zx_timer0_irq_base_of_init: ==========1>g_timer0_irq=0- n# F% b3 \0 b, D) |
get timer0 irq succeed,g_timer0_irq:14
7 V G2 M- n" h; J8 V. F# g! K7 bzx_timer0_irq_base_of_init: ==========>g_timer0_irq=14,timer0_base=0xffffff8008c 8d000
: E) I K& e6 M8 ?get timer2 irq succeed,g_timer2_irq:15
3 ?( x' h; s Y" Spon init" O" c( ~9 O- o8 b1 U6 `
sys_ctrl_base is 0xffffff8008c9d000
- w) R8 x# s( A$ G6 {5 k5 v/ gtop_crm_base is 0xffffff80093d00001 U5 E- ^& m- [5 T
pin_mux_base is 0xffffff8008ca50002 S5 {5 R) ?$ z" K
efuse_base is 0xffffff8008cad000
# M1 y8 S+ \! C5 j. ?+ J/ g! |pon_base is 0xffffff800d000000
* f7 S. h Z( B" A# e% d' Y, Zg_pon_irq:29, z: n/ O5 v/ [1 C; M
pps_base is 0xffffff800f000000+ x* Q8 |* ~) \/ _* y) `
nppt_base is 0xffffff8011000000) N' C9 N! \9 T* q2 t* f( K+ i/ ]
rgmii_base is 0xffffff8009900000
- a1 Z4 n0 k0 I- H# l& p4 ?pon_serdes_base is 0xffffff8009810000
5 u% h: ]: p) O% g7 O% Z' g" [pon_serdes_pll_base is 0xffffff8009830000
% S B w% D3 G. c' m4 c+ funi_serdes_base is 0xffffff800a100000
; n# w/ J5 w1 opcu_base is 0xffffff8009850000
6 [/ f1 C% v2 T! S1 [9 h/ bgephy_apb_base is 0xffffff800e800000
7 H7 U* A* P2 l, @7 F8 i: ?- P4 E0 Midm-intr0 is 40: V2 R% Z; h8 I3 R! ^) E8 K
idm-intr1 is 41: W/ A+ n% U, Q- |1 m l
idm-intr2 is 42* |$ O) B+ I: i' L; q1 j
idm-intr3 is 43
/ G3 N' C% x/ o5 J: x7 |zx_pon_irq_base_of_init: idm_ddr_phy_start 0x80b23000, idm_ddr_size 0xee5000
; t7 W, b% G8 F/ @! a6 n u oxmac0_pcs_base is 0xffffff8014000000
* ]0 U" }2 h! T) j2 Q[zx_pon_irq_base_of_init] hol not enable
, }" o5 K2 u1 z" d/ \enter gpon pon pll cfg& ]/ y# n6 z- ~3 @# \
mode_xgpon_nsyn_cfg
; ^% J& g% n0 t& Fcom_pll_lock_ready
2 a: m1 G' s$ Z4 p& i( Erx los =0 rx data in
0 g; J1 M9 x9 y; z" f$ r( R) ]cdr_lock_ready
- ?* {* D3 ]) Ipon serdes init succeed
1 s( ?* Z+ o" Y5 b6 {pon mode is xg9 D2 t0 v7 y5 F* G: ^# y
idm cci enable @+ J4 l N- D8 o, d g
CLK_MUX_3 is 0x06713277,CLK_EN_6 is 0x00001fd7.3 A, S7 i" u2 c/ o& m
val =0xffffffff, reg = 0x000000002c1966ab
% l0 K, O+ m( v a, R/ xreset val =0xffffffef( \$ |. ?8 Q+ |) z
val =0xffffffef, reg = 0x000000002c1966ab* f" j2 F0 O0 o* u1 J" l; T
reset val =0x7fffffef) Y' i% V; {7 z/ y( f4 e5 @/ x$ f
restore val = 0xffffffef- B `: U- G( |: Q
nppt init done ok. cnt = 0. x% ~8 z$ D+ x$ R# w
val =0xffffffef, reg = 0x000000002c1966ab
8 \4 ?0 D- F( j+ O5 grestore val = 0xffffffff
* `5 g; @7 M+ @- qpon int
' o5 a- E: f& Z/ C4 u/ Fnppt int8 Z: v& z2 m3 l7 n; v. \, y
pon probe init ok
- f B. \' a- V; O! ]$ t9 ]; H3 dnppt init start4 c0 U% f* J- w" V
init gephy apb base
0 U9 N- q% R0 A+ y! N/ pval =0xffffffff, reg = 0x000000002c1966ab
% d, z" Z: D) z" Yreset val =0xfffffffe
' Y1 @+ j0 |% y: U3 d5 ?restore val = 0xffffffff7 {' H, S3 B5 z; l& n) c7 ~2 g
enter smac_init
8 N) O Z; c$ c6 C# r9 f2 U, ~) nsmac_init: smac_pkt_filter = 0x80000001, mac = 0x0
' E$ \- a! O: t" u& ]" @6 y7 Swrite smac an ctrl ,mac = 0x0
9 y( b6 ?* q! F- T& }- t0 ^read SOPC_CLR_OVER_READY_SMAC = 0x1, mac = 0x0
1 y) ]7 z4 ~* W6 }( e! Bwrite SOPC_SEND_EN_CFG_SMAC,mac = 0x0* O9 X, v" K3 h) i+ T6 `* g
sopc send enable ,mac = 0x0
/ l: H; D/ d0 f) z& U# Nexit smac_init:mac=0x09 G; y; F" u) Y" ^; W5 j/ l; @+ h
val =0xffffffff, reg = 0x000000002c1966ab
% M, H) k4 z9 u+ lreset val =0xfffffffd
0 N+ O* B7 x! }7 {$ O" l' m6 frestore val = 0xffffffff
4 Z! q- `9 \2 |. ]2 J2 H5 p' F( Lenter smac_init
5 M. i! o7 i& hsmac_init: smac_pkt_filter = 0x80000001, mac = 0x1
0 w1 l, `, ~, E" Pwrite smac an ctrl ,mac = 0x16 L( ~4 v+ J# e8 y5 a7 K B
read SOPC_CLR_OVER_READY_SMAC = 0x1, mac = 0x1" d7 u, T! J5 X! r
write SOPC_SEND_EN_CFG_SMAC,mac = 0x1
( r* y9 Q1 K/ `3 Isopc send enable ,mac = 0x1
$ r- j8 Y$ y/ n' H2 B( i$ }! }exit smac_init:mac=0x1
+ J7 j. A% r* Fval =0xffffffff, reg = 0x000000002c1966ab
6 v( G- \ Z* s% xreset val =0xfffffffb
# k0 w8 w5 p3 }2 W C* I2 Frestore val = 0xffffffff1 n0 N! m3 o/ P
enter smac_init, c6 Z1 D3 @& Z- X- X7 s2 I. n
smac_init: smac_pkt_filter = 0x80000001, mac = 0x2
, F* Z' r4 u* ~+ wwrite smac an ctrl ,mac = 0x2
% M" Y8 D* x; k& y5 X2 cread SOPC_CLR_OVER_READY_SMAC = 0x1, mac = 0x28 B9 x4 Z: ]) K) Q
write SOPC_SEND_EN_CFG_SMAC,mac = 0x22 S* B6 X4 @0 W2 G
sopc send enable ,mac = 0x2
' @& U7 S/ a( r5 texit smac_init:mac=0x2
: j+ J' x" r' y$ H! _, `val =0xffffffff, reg = 0x000000002c1966ab
/ V, g/ ]# m- }3 `( Freset val =0xfffffff77 Q" h$ ], ]( f
restore val = 0xffffffff
- }* a& m1 B2 M( Fenter smac_init3 I4 d0 ]9 i+ ~: A( ?2 P8 s. }
smac_init: smac_pkt_filter = 0x80000001, mac = 0x3) h) ^9 I& n/ p4 B
write smac an ctrl ,mac = 0x38 M% Q$ `7 H2 h6 c
read SOPC_CLR_OVER_READY_SMAC = 0x1, mac = 0x3
1 _: }" [$ ]0 _2 u7 s6 Pwrite SOPC_SEND_EN_CFG_SMAC,mac = 0x3
9 V j" o' d: C8 h5 ]3 f1 X8 Fsopc send enable ,mac = 0x3% X$ X% ]& x; { l; z8 e
exit smac_init:mac=0x3
* z# V; |7 y- ^. f L- M[outerphy_phy_init]ERROR:param-><index:1><outerphy->outerphy_name:0x8af56d9>) j' h/ ]6 G6 V% f ^: M& o
<outerphy_attr_array[1].outerphy_name:realtek fephy>
3 p- m, u8 \3 @" S8 v[outerphy_phy_init]ERROR:param-><index:2><outerphy->outerphy_name:0x8af56d9>% f8 h5 O$ j: ]/ x
<outerphy_attr_array[2].outerphy_name:phy_88E1322>! Q8 m1 ?7 a1 p$ O# w
[outerphy_phy_init]ERROR:param-><index:3><outerphy->outerphy_name:0x8af56d9>
) q( e1 K+ i# T' x- L7 a* r <outerphy_attr_array[3].outerphy_name:phy_zx5201># X$ c8 h3 a w8 `0 _
[outerphy_phy_init]ERROR:param-><index:4><outerphy->outerphy_name:0x8af56d9>
+ k4 `* g- s+ ]1 {) y: Q <outerphy_attr_array[4].outerphy_name:phy_YT8821>4 k. N, E! [4 e) I# D- j
ddd
% B; E, f! r* i- Q% S/ l% ^dd[outerphy_phy_init]ERROR:param-><index:5><outerphy->outerphy_name:0x8af56d9>, d" O% r; u+ X
<outerphy_attr_array[5].outerphy_name:phy_RTL8226>
9 T; O% Y6 ]9 B$ F: h0 serdes option is 0, u5 J* k4 f) q: \" V4 s
xmac0 is used' }) O4 I/ k! C6 q1 l- _
[outerphy_phy_init]ERROR: Can't get outerphy_desc! Plz check about it!
5 W2 O6 v2 y) G4 z1 v: g$ I[outerphy_phy_init]ERROR: Can't get outerphy_desc! Plz check about it!: |. t5 }/ ?' D6 b: x' H; ?
mac 0 link down
/ v9 h8 w4 @& g& J5 {+ R2 omac 1 link down9 j" q/ x2 Q: ^: C, o
mac 2 link down4 u8 m y$ q* p9 Y% S# o% D
mac 3 link down
0 q6 [! W& P" G% b3 {7 L7 s& v Jmac 4 link down
9 t" a. P: v8 e* L! i; ]8 l \1 idm_ddr_base is 00000000b5d0cd85, phy addr is 0x80b230006 y- u0 t. h, F# f6 _/ M
ddr size(0xee5000), idm used(0xee5000)* |1 A: O* V$ W5 F1 L; ^) v1 c6 y
irq[0] sg_idm_irq_mask_conf(0x71ffbfb). ^- k1 K9 Q5 w# | P9 T# u
1110001111111111011111110117 M6 w+ X4 ~2 ^
irq[1] sg_idm_irq_mask_conf(0x200000)$ _! e1 J1 B" h4 u) X5 v; V
0000010000000000000000000007 A/ v* T' U8 x& y0 n" f1 w
irq[2] sg_idm_irq_mask_conf(0x400000)- ~% N, s5 |* Q: v2 [# C
000010000000000000000000000* _9 @1 a- X6 P' V, z# ?
irq[3] sg_idm_irq_mask_conf(0x800404)
. i; o) k* q Z& w- u000100000000000010000000100
3 T4 h' M# W; a8 xidm net init ok
0 p( ?" c; {: A% M. T3 R" u% ^3 ^8 enppt init end. ret = 0' ~7 l* ?3 `- M$ S: v
init np_reg module+ B( c4 D3 C6 g$ m$ l. z9 F
init np start) i& h; v# l1 |$ e
creat ddr space for bmu./ u0 W- W- B2 s. z; U U( A |6 r
[zx_bmu_ddr_probe]:ddr space(start:0x81a08000, size:0x1f60000) for bmu
' w: }- i& K4 V+ mpp_bppe_pool_init: BPPE_PA_BASE = 0x81a080005 A" J2 c2 P1 Y* l: Z4 W' C5 M) o& f
pp_bppe_pool_init: bppe_va_addr =0x00000000a5818b11, BPPE_PA_BASE = 0x81a080003 b; P5 z1 n5 {; X1 A1 \$ ]
tcont mode is 0
! k5 t4 b2 G8 c/ X- u! c2 Hddr space(start:0x83968000, size:0x400000) for hash table* I9 j* @, R0 ^& y; W* n
version: 0x0001.0x0108.0x31ba6a035 u, f0 D; v8 ]- l1 c# Z
tm acl init, ret = 08 r) M& e2 R8 k4 g
[mul_ip_db_init] mul_ip_table_busy_lock!% i" x C6 n0 {6 Z L
[outport_and_real_port_map_table_init]real_port: 15 real_queue_id:419$ D7 J T6 v7 o3 I) [
[outport_and_real_port_map_table_init]real_port: 15 real_queue_id:419
. W) |% P& J) g! w; e, w) ?$ T[outport_and_real_port_map_table_init]real_port: 15 real_queue_id:419* X; [7 _% X' L
[outport_and_real_port_map_table_init]real_port: 15 real_queue_id:419
5 r% R/ B4 _* v" r. m9 C[outport_and_real_port_map_table_init]real_port: 15 real_queue_id:419
& q0 y) G( ^" i# d f) x[outport_and_real_port_map_table_init]real_port: 15 real_queue_id:419* _8 p5 H; {8 f. i. ~% x; v3 J
[outport_and_real_port_map_table_init]real_port: 15 real_queue_id:419
# H3 c% z, N+ w0 Z$ e8 B[outport_and_real_port_map_table_init]real_port: 15 real_queue_id:4195 i+ H# v+ E/ O! g
user table init success.9 D) J8 b, C0 Z( W5 V1 P# Q
Low power buf start phy addr:virtual addr:00000000ed718e3c
+ s) B& t0 t4 P* z- @7 K, gcreate xemac_task_thread ok!9 w7 E# S/ n* s7 o, q
init low power success5 t; I* `! g7 G/ A( Z
init np success) y; ?2 O1 M; t* t, g# U
NP Module SYS FS Init ended successfully =
* u% U1 _7 k* V- ?- G1 _4 ]init np_reg module success
* d: o( c% }; f {# h/ H[proc_pon_debug_dir_init] success!9 L9 q z v0 ?3 Y
[proc_pon_tm_debug_dir_init] success!
, X+ R# E8 J, X' Zipsec init enter" @. a& e5 L& b, D9 Y) G
ipsec hardware driver will not init because the devicetree of ipsec is unavailab le.
$ v& m% G( E4 t( Tpon_sta_filter_oam_omci_cfg_set enter
9 @- O4 g1 P8 Gpon_sta_filter_oam_omci_cfg_set end
& `& @/ f4 Y( R: F3 |: g; m+ scurrent chip is ZX279133
7 \6 I5 n/ ]1 `% C2 P* l# b' D############################# 133
3 ?* x2 r$ w, t6 w- z z; H ~init_module: umod=000000006c23bced, len=8792, uargs=000000007b29053c
$ i9 i o. C6 T* ]! X/ Nzx_ponreg_133: magic '4.19.136 SMP mod_unload aarch64' should be '4.19.136+ SMP mod_unload aarch64'
2 @- d% h" v$ z! _4 a, M$ N$ Q/ Ujffs2: notice: (945) check_node_data: wrong data CRC in data node at 0x02b4eef0: read 0xee37cbcd, calculated 0xd068f8d.3 |; y9 [9 R% P- t0 R5 W6 }- Q T
qupengchao : symname is init_module
% Y, p/ C' ]$ b4 Yregister fpga driver success, major=2227 B8 w5 f. {6 x
jffs2: notice: (945) check_node_data: wrong data CRC in data node at 0x02b54bf8: read 0x68c47d75, calculated 0x8cb69dd4., w3 a+ ?. Y2 E4 Y- N# v
init_module: umod=000000006c23bced, len=92416, uargs=000000007b29053c9 O8 {7 P0 W G3 `7 Q9 Z6 Q( U
qupengchao : symname is init_module4 J- Z' r2 r# C3 d
init_module: umod=000000006c23bced, len=5736, uargs=000000007b29053c7 J# D. J" [7 C/ [3 t
qupengchao : symname is init_module
; y$ p l8 E5 d* C, n+ E' y5 ^: B& xregion_code_init region_code:307, ret:0
- g4 F9 N" Y" `' K6 [ }9 Tinit_module: umod=000000006c23bced, len=84992, uargs=000000007b29053c
2 h' Y" Y9 @/ Y6 l0 z: }& pqupengchao : symname is init_module
9 c6 r, Y* Y7 {. N- q9 F8 j9 ^qupengchao : pon0 create success
; @# e, }9 ^1 M- I9 J( t11930:23:16 [U_busybox][Warn] [ifconfig.c(999)ifconfig] SIOCGIFFLAGS2 F! s1 N9 w7 P& B
init_module: umod=000000006c23bced, len=42384, uargs=000000007b29053c
4 u/ p7 N- q8 y. X% rqupengchao : symname is init_module6 B' k# ?% u5 T/ W
iprt_data_init success!
0 H! ?4 p$ x* t9 e. K, [init_module: umod=0000000067964c36, len=169288, uargs=000000007b29053c
; D, f5 M- x) Q$ V$ @qupengchao : symname is init_module
" S1 T6 p6 w$ O8 ]init_module: umod=000000006c23bced, len=48552, uargs=000000007b29053c
' l5 N3 Z) n6 ^) I! n9 f9 P" Mdqupengchao : symname is init_module
4 \ T& Q0 ^* L. m/ D! U* `ethdriver_init....+ ?% N5 y7 K+ K0 S6 \
g_mii_dev_name[0] sw
" |$ {& G8 c$ ?3 O7 G# n: e6 mg_mii_dev_name[1] pon% V" t! A" g( u, q+ z/ D" i7 U8 j
init_module: umod=00000000669be306, len=284952, uargs=000000007b29053c
2 o2 X4 Y& @" i. W3 {qupengchao : symname is init_module4 q" s( l8 t% q8 g) {
init_module: umod=0000000098178684, len=853280, uargs=000000007b29053c6 x4 L) M, G% ]9 l# p, n0 [
qupengchao : symname is init_module
( m( m# \5 \6 Z3 G$ R# R3 f/ sInit switch module/ C' _8 S5 v$ o+ k8 c b- a8 C
d[se_eram_table_check_out_of_depth] cur_bit_offset(8192) is out of range( j6 M5 g- v4 ?4 J$ M
[se_eram_table_get_by_sdt_info] para error
) G) d2 `2 K; y/ j, A m[se_eram_table_check_out_of_depth] cur_bit_offset(8192) is out of range- a- R. ?4 ^) ~
[se_eram_table_set_by_sdt_info] para error
1 m! U1 E% k' F* J' ^: L+ l[port_attr_def_route_mode_en_set] port(64) set table ▒▒#_attr_name▒▒(0) fail
; C4 O. d1 d, N5 V& K, t[tm_port_route_mode_set] set fail
" k- k; F& p% v8 ^" b' x, }1 _init port route mode fail8 s6 u8 \9 Q* C8 P9 y+ x7 S7 E9 h
sw_cap.SW_ETH_UNI[1] = 4.* r* a# {- z$ N6 q
sw_cap.SW_ETH_UNI[2] = 1.* c" K% {8 z4 l. t6 ^
sw_cap.SW_ETH_UNI[3] = 2.: e$ R$ ]8 E# o* a% s; g
sw_cap.SW_ETH_UNI[4] = 3.6 Y* t' E. e0 G- ^" W6 s
zy uni num:4
0 B- J) [. A) _3 }# e: pzy switch all port count:7
6 j5 h5 S9 b+ Y. e% b0 _switch config 9132 GPON mode!6 H9 E) a0 o+ c$ F
[yqs]set cpu queue rate limit to 4000pps
& {% L, g+ i# T- A: C9 A" l[SW][sw_init_switch] reg hff6 T; ]# E' s/ Z, H. Z$ P9 @, [
[SW][sw_init_switch] reg ipsec up hff
4 J, p, P K; P* E/ J. `' I[woe_reg_register] enter woe_reg_register!
, a! `9 S& _( v4 n; V# `& r, D[proc_pon_switch_debug_dir_init] success!+ d: H- o W6 d. O; l
create stati1_turn_thread success.
% k* I: Y" U* z+ e/ h/ AInit switch module Success
. D5 b3 m8 j5 e7 T[zxic_api_sw_upmode_set]input:upModeInfo is 0x40,new_upmode is 0x40,new_lanup_po rt is 0 new_wlanup_port is 05 E; q, S e! b: \- u8 m& I
[zxic_api_sw_upmode_set] done
" s" k: q; D0 x$ E& ^' @0 oinit_module: umod=0000000033815f7d, len=308856, uargs=000000007b29053c
' Z9 w* \6 \5 S9 t3 W/ fzte_xgpon: magic '4.19.136 SMP mod_unload aarch64' should be '4.19.136+ SMP mod_ unload aarch64'+ [6 T* O) C% k' S0 n1 s
dqupengchao : symname is init_module
; a: z, Q- } G8 ~1 b' k. F1 D& t$ p/ hinsmod gponsdk_dev+ A' _: G! X, i- g% S$ p6 B [
XGMAC: VirAddr:0x00000000199064589 i$ E+ u* s( k6 q( `! K5 N
pon mode is xg
9 X! F4 y/ b7 s# z# V( k! O- [0 Finit_module: umod=000000006c23bced, len=66504, uargs=000000007b29053c
; o" C6 W8 f8 _2 o. b/ n3 k, Wqupengchao : symname is init_module
" {1 m1 a+ w) l' y% G2 o' ^gpon_Init ok
8 V d- K; K, O" h. o# tNo need to load RTL switch chip driver+ D7 x1 e) m" u$ U8 p5 b x
init_module: umod=000000006c23bced, len=47496, uargs=000000007b29053c
F! e" ?7 i" C7 P% b$ qqupengchao : symname is init_module
4 ]* Y0 z9 t/ i! C7 A W4 LGN28L95 read table 0xFF chipname-register success,chipname=0xFF.$ g7 K0 y2 N2 s" |4 F3 E
UX3360 read table 0x86 register(0x80~0x85) success,chipname=.
5 e' ]/ t$ t: J& G* ^+ _7 v PUX3361 read table 0x87 register(0x80~0x85) success,chipname=UX33631.
9 V$ N* C$ u& ^+ g" Z: Mbsp_mcu_eeprom_mode_select read table register success.
: k* t j. z2 ]" O7 w ~: O8 cjudge chip select mcu(0x*0) or eeprom(0x*1) mode ! count=0, judge_reg=0xFF.
) L( }; S# z2 [7 _1 jbsp_chip_probe count=0, r_data=0x00.1 P1 z$ ?3 Z' c# D c B% e
UX3361 found.
- c$ g a. t% B* sbsp_UX3361_probe 0x51 success!5 O5 u3 P6 D7 h' B- L; E# I
Optical select UX3361 mode is MCU.
- k8 p( @/ A% o. u, @. ovendor name = ZTE_XGPON1ASY# r3 @, N3 f5 C2 S( o& U6 O
6 i+ Z+ ?* g, L
temp_PN = ▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒
3 f3 l$ ?. X6 c% B7 `9 }' ~
9 V" R+ [2 F' X5 A& a optical PN(0x60) = ▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒2 |( b3 ^7 w+ c6 ^& L: z
optical PN(0x28) = GN28L95
$ R; `6 {6 x) `8 v6 S6 c4 x, b/ }dinit_module: umod=000000006c23bced, len=34880, uargs=000000007b29053c1 ~$ Y$ r! @+ C2 a+ _
qupengchao : symname is init_module0 u6 v0 x# T4 G6 L/ B W- X; U
udpwatchd inited!
9 d7 X6 L9 I2 L; M7 h0 mkudp inited!
5 u6 W5 f" A$ v! w$ p0 \* C0 iinit_module: umod=00000000e819560c, len=332416, uargs=000000007b29053c
9 W: H; y! ?' m5 c: \# x2 J) Pdsp_dev: magic '4.19.136 SMP preempt mod_unload ARMv7 p2v8 ' should be '4.19.136 + SMP mod_unload aarch64'; e1 G& b# C* }7 X0 x, M
voip_codec: module PLT section(s) missing
( t8 x! d4 V% g& ?4 S4 u4 equpengchao : symname is init_module
* z; [0 ?' A* gInit codec v2.5(2019-09-18)!
H0 k8 d& g2 I; u6 b& ?init_module: umod=00000000ed2969d6, len=161840, uargs=000000007b29053c& I4 l5 q% E, g1 @: M
qupengchao : symname is init_module
9 e7 L, u0 Q2 C. N: ]P_2833: Setup 0" X% H5 G7 b% M) d
DSP device setup OK!
0 X# y- ~9 V$ n) g+ y" _dsp binding cpu:1
, L+ B; G+ X8 ` P. y# Tdsp softirq- p4 C/ u3 S9 a1 c: t
init_module: umod=000000006c23bced, len=24536, uargs=000000007b29053c* X( N1 q2 N4 F
qupengchao : symname is init_module. }6 J, _0 n) D- g( r
G_XGSPON_MODE is 0(XGPON)
2 A% \1 [# }2 n' `init_module: umod=000000006c23bced, len=27960, uargs=000000007b29053c
* k% P- j2 @! d- W1 ?qupengchao : symname is init_module6 `! S0 Y' S- o( e- U5 S
dGN28L95 read table 0xFF chipname-register success,chipname=0xFF.' U4 ^7 f8 D8 N1 R% C! n' r8 A
UX3360 read table 0x86 register(0x80~0x85) success,chipname=.9 @, D3 |# {: `: x* e$ D+ }0 a* F% I6 r
UX3361 read table 0x87 register(0x80~0x85) success,chipname=UX33631.
+ [4 e1 w6 b# X1 E! \- e; D" O" @5 ybob chip select is UX3361.
6 E" l) y" q8 W5 E7 X8 Pbsp_mcu_eeprom_mode_select read table register success.
, P4 ? f9 S9 j; ]judge chip select mcu(0x*0) or eeprom(0x*1) mode ! count=0, judge_reg=0xFF.
3 w: g ^/ r6 A# ]3 Sdbsp_chip_probe count=0, r_data=0x00.
/ p- G4 P% S IUX3361 found.& I8 L" X2 Y6 h0 N. D; h
bob select UX3361 mode is MCU.
# G# Q1 B( @, h6 F9 L3 hKmodule GN28L95.ko insmod successfully !
+ v' \& b" c( q8 x; @ bobtest create /userconfig/GN28L95_datas_backup/BOB_CHIP_SELECT
2 R' J R$ b9 c+ HBob chip_type: UX33616 S' E; P5 A2 s/ P3 F5 z
bobtest GET_BOB_CHIP_SELECT OK
; U% X8 @ O* ^! Q bobtest create /tmp/UX3361_MCU_MODE0 L: m" m7 a' }; }5 A* s
Bob chip_type: UX33613 g# V& U) z2 ?
bobtest GET_UX3361_MCU_MODE OK
, o. w0 Z0 ]. \6 ?0 wWLAN_TMP_MD5SUM_VALUE=717e1cd37329309ec465387e99e04245
9 T, | M+ J: B# y3 z$ ^USERCONFIG_TMP_MD5SUM_VALUE=717e1cd37329309ec465387e99e04245
* q2 W+ L3 D2 D. F- ^8 V5 T ydWLAN_NOW_MD5SUM_VALUE=717e1cd37329309ec465387e99e04245
) Y' }/ d$ f, h; O" Q+ Z2 J* E) lUSERCONFIG_NOW_MD5SUM_VALUE=717e1cd37329309ec465387e99e04245
, ?/ A& k8 V$ o/ b/ z# ]1 NWLAN_TMP_MD5SUM_VALUE == USERCONFIG_TMP_MD5SUM_VALUE, a3 b5 w: I0 S. z
WLAN_NOW_MD5SUM_VALUE == USERCONFIG_NOW_MD5SUM_VALUE, everything is OK, leave!- w$ A+ J" f/ v5 K' `1 Y
Bob chip_type: UX3361
$ t2 a, Y, K% Z7 M# ^" Dbobtest write_all_datas_to_UX3361,load data from flash to UX3361!
2 R; m* P7 }3 X+ I1 |8 ]8 x0 v3 S" n# mbobtest table_select_UX3361 128 OK
. u( o2 ]* e2 _8 v# d0 O2 O) s5 T' ^bobtest reply_read_reg 162 183 0
1 |, C g' ~2 W* F& ndbobtest table_select_UX3361 128 OK$ A" k# N9 T2 i
bobtest write_data_to_UX3361 162 0 123
: b* g$ n* ?7 s, Y& k$ Pdbobtest table_select_UX3361 129 OK4 l& J6 `: g7 H7 O# F0 D9 F
bobtest write_data_to_UX3361 162 128 107% ]: c$ R- n7 X' F
dbobtest table_select_UX3361 130 OK) J$ i, m8 a& T( r
bobtest write_data_to_UX3361 162 128 1076 v6 g; ?/ c% V; s( u% j; Q
bobtest table_select_UX3361 131 OK$ s4 g. o, Q( {6 i4 J% `
bobtest write_data_to_UX3361 162 128 107
' O# j) \$ R2 M: c* W0 Ddbobtest table_select_UX3361 132 OK" D& m6 a+ L. y' ^: \% s
bobtest write_data_to_UX3361 162 128 128$ G- P# R# |* Z% `3 y
dbobtest table_select_UX3361 133 OK
$ S; n( R/ j+ k1 m" bbobtest write_data_to_UX3361 162 128 128
" ~3 }) n: M3 k# b. ]- x/ P4 _ddbobtest table_select_UX3361 134 OK0 ?: K2 I; G6 q- k$ |, f x* l
bobtest write_data_to_UX3361 162 128 43: G( O* a+ m% h$ ?0 G- }
bobtest table_select_UX3361 128 OK2 R3 } Y5 z @+ |% ?+ G
bobtest write_data_to_UX3361 162 128 128; B4 X- b/ s" A R: x1 c7 w! C
dbobtest table_select_UX3361 128 OK
$ P8 \, K" `5 t3 U0 V! |bobtest write_all_datas_to_UX3361 duration: 1.237986, R4 r( F d8 I- ], R& s
write_all_datas_to_UX3361 finish!!!1 b, @( o3 t* I) W
exit factory mode!
( O4 i9 g$ H- s# g4 N/ |* hinit_module: umod=000000006c23bced, len=33528, uargs=000000007b29053c
4 _: E$ q! H2 @& cdqupengchao : symname is init_module
_" X6 U, I i success : download_init 1343, s1 Q" T5 M! X( S
init_module: umod=000000006c23bced, len=38288, uargs=000000007b29053c
! f; j+ R% O3 d1 t' U- s6 H& xqupengchao : symname is init_module
; T8 \( X) g" E* d1 k' W8 C[kernel upload]:upload init enter
i/ l3 Z1 D( `& W# w& \[kernel upload]:upload init sucess0 u( e d4 m8 f+ `! t
IPv6: ADDRCONF(NETDEV_UP): tunTX: link is not ready
" Y! w5 ?+ ^7 ~6 Q" K+ z! m x, KIPv6: ADDRCONF(NETDEV_UP): tapTX: link is not ready
+ X: e: E; ?$ C; P p! sMemory mapped at address 0xf7b2f000.6 C* a3 a% e6 E6 d" C
Value at address 0x19140240 (0xf7b2f240): 0x0& n \0 `) R; e: c" i0 V' k: `$ P
Written 0x1; readback 0x19 ^# n' |* E1 ~- l% u) Z% f# [" w
sky:loop check_and_reinit phy
0 W5 V; `; Z7 p5 J j) g5 x/ oregion code:307
6 Q( q$ R6 Q M1 v2 _& v- Wregion name:Beijing
- Q( |( ?8 t" H5 g1 y/ s6 w, _dsky: lan:[4], pots[0], wifi[2]
8 Z) R8 k5 B6 Rsky: could not found config xml [/etc/gponcfg/db_default_Beijing_novoip_cfg.xml]
) U; }2 y. c* Y' @sky: try [/etc/gponcfg/db_default_Beijing_cfg.xml]
8 o% p- _$ L8 K9 Z/ y& _sky: found config xml [/etc/gponcfg/db_default_Beijing_cfg.xml]
# B- _- H* V! J. T) t; M( ~9 ?USER_CFG is same as ETC_CFG, donot need copy
4 }% T3 p+ @' y' A1 Z7 E- ]$ U===================================================================& Q: x' ^8 g& p$ D- A! r$ q
Database default setting is [current : 307]
& x" r; H1 @: ]5 {chown: /webpages: No such file or directory
! d. R6 Y8 h* G/ LdFailed to set capabilities on file '/bin/ipsec/starter': No such file or direct ory
' h& L' p4 @0 {- Z8 H) kFailed to set capabilities on file '/bin/ipsec/charon': No such file or director y
2 q0 [) `7 B- s7 r' R- ?dmodel:0 P u' y4 |3 c l# I8 g5 g5 A( w& W
SK-D847N9 o; X* ]( _" G1 E; K
dsoftversion:
$ I6 D" z3 d5 K* g! eV2.0.0" f. H* \' g7 m z8 _! @( ~1 i
dhardversion:9 Q; W+ t$ O9 s U+ u$ Y4 B
V2.0
( Z) M. u5 O9 G. }$ Mdfull_version:
" K) k) F7 |3 q e9 i- {SK-D847N_V2.0.0_SVN317966_VID002_DQ307 ]7 D9 P0 y$ E
*****************pc start********************
- x! c4 O5 {- y) Z m" b8 b" B*****************echo 5000 > /proc/sys/vm/min_free_kbytes********************
9 J9 u4 [/ o8 |# ^- u11930:23:20 [U_cspd][Warn] [zxicd_main.c(191)wifi_proc_contr] clib_scan_wlan_chi p cChipNum=27 m: N! h2 ]. c e4 e) E( E
OSS: start cspd[0x10000]( C+ G k% O& W4 `
dchmod: /usr/local/osgi: Read-only file system
6 P5 F6 R- h- x. e* p7 i1 f/wlan/age.txt exist
" S- x* K E3 G0 Q
' W' t- x& Z$ T+ T/ c) ?11930:23:21 [firewall][Error] [fwsc_mgr.c(752)reg_fwsfs_mgr_p] reg_fwsfs_mgr_pdt _cb melon
. Y' e$ H$ W- |1 P( B11930:23:21 [dss_mgr][Warn] [dss_lla.c(946)si_dss_lla_main] The Dss' lpMsg is nu ll.
# E$ s1 a; e. y* z11930:23:21 [wlan_adapter][Error] [wlan_adapter_mt(362)Mtk_Init_7916] ====>Mtk_I nit_7916!
& y# y) E$ t6 n7 D0 o11930:23:21 [wlan_adapter][Error] [wlan_adapter_ma(57)wlan_type_init] wlan_chip[ 3].Init790a_7906!/ _0 e" F0 g" v/ ?$ z' D
11930:23:21 [wlan_adapter][Alert] [wlan_adapter_mt(397)rlk_wlan_adapte] rlk_wlan _adapter_main, g_Wlan_Card_Max=29 _5 J/ g/ b1 Y; _$ a# {: I
11930:23:21 [osgi_proxy][Warn] [osgi_proxy_mgr.(496)OsgiProxyMain] OSGI_PROXY_PI D tUsbDevInfoListShmid sinit_module: umod=000000006c23bced, len=9768, uargs=0000 00007b29053c/ A7 g. R* l* K
hmget init ok!
; M, s: g( u2 y$ K4 f8 ~dbg: runing cmd[cat /proqupengchao : symname is init_module. n/ _6 q, z: ]& Z
c/capability/boardtype | sed -n 1p | awk -F ": " '{print $2}']. ^1 P) N* u; m. l0 _) T
[si_lan_eth_filter_init 71] start.3 U _$ F" [% [ f
11930:23:21 [schedule_reboot][Error] [schedule_reboot(365)schedule_reboot] mx_de bug schedule_reboot_init
7 B" R- c4 f V; J* vdbg: runing cmd[cd /etc/Wireless/RT2860AP; find ./ -iname "MT7916_EEPROM*tdy09.b in" | sed -n 1p | awk -F '/' '{print $2}']
4 b, w7 a; A! y6 N; E: g1 J7 K[get_obj_string]obj_str=MT7916_EEPROM_tdy09.bin
4 k4 U# c/ k2 L: v0 s$ [% r T! {11930:23:21 [DB][Error] [dbc_mgr_file_xm(3219)zxicDbXMLCreate] zxicDbXMLCreateTb lLoad tblname(EASYMESHCONFIG) ptViewParamFun is NULL error.
- r4 ^. W9 X0 |6 V11930:23:21 [DB][Error] [dbc_mgr_file_xm(3219)zxicDbXMLCreate] zxicDbXMLCreateTb lLoad tblname(UpgFirReboot) ptViewParamFun is NULL error.
, C [" m' L/ x( I- c
* h+ B- T6 [* t) k5 f4 _. [11930:23:21 [DB][Error] [dbc_mgr_file_xm(3219)zxicDbXMLCreate] zxicDbXMLCreateTb lLoad tblname(LedTime) ptViewParamFun is NULL error.4 }, @0 `+ u9 R1 s
11930:23:21 [wlan_adapter][Warn] [wlan_adapter_mt(6387)checkAndSetEepr] both /wl an/MT7916_EEPROM.bin and /tagparam/MT7916_EEPROM_bak.bin exist
y! g4 }5 N: {! l2 U11930:23:21 [wlan_adapter][Error] [wlan_adapter_mt(133)checkAndSetEepr] ENTER ch eckAndSetEepromFileMd5_7916(133)# D# l% m6 a7 H- Q* `1 P
11930:23:21 [DB][Error] [dbc_view_dev_in(231)Get_Wifi_Type] Get_Wifi_Type:e_wifi _type=0x20' L9 A6 k) P: Z/ y1 F( I/ v; z) W
SKY_MODEL_NAME has setted, leave!, |+ o" V+ N5 Q0 U% r5 ?% d9 ?$ L
11930:23:21 [DB][Error] [dbc_view_board_(143)GetStrFromFile] pon not found.
" d j2 X2 h6 m0 |5 {3 h11930:23:21 [DB][Error] [dbc_view_dev_in(351)dbGetPortCapabi] Get pon port faile d!* n% o: V0 B: @- K5 G
11930:23:21 [DB][Error] [dbc_view_board_(143)GetStrFromFile] ups not found.1 G: ^# i3 P$ V2 g9 [
11930:23:21 [DB][Error] [dbc_view_board_(633)dbDefBoardInfo] GetUpsDevNum failed !
* t* F# P9 K$ }, a11930:23:21 [DB][Warn] [dbc_view_telnet(71)is_region_0] sky:init telnetcfg, regi on is default [False]1 O. @1 Z1 I- c+ | Q+ q Z
11930:23:22 [DB][Warn] [dbc_mgr_init_cf(413)sky_db_init_mob] MobileAppInfo.BooTy pe set to 1, H; v6 {! G% S2 v/ j) {
11930:23:22 [e8_vlanbind_mgr][Error] [e8_macbind_mgr.(80)macbind_init_op] macbin d init option60 msg queue success
x* G9 T6 D8 k) M
( U! H4 ?6 i4 d X11930:23:22 [firewall][Error] [fwlevel_mgr.c(760)reg_fwlevel_mgr] reg_fwlevel_mg r_pdt_cb melon
! ^4 A, y1 m9 _7 z+ `) c ]) [11930:23:23 [wlan_adapter][Warn] [wlan_adapter_mt(6592)md5_sum_cmp] ************ ENTER md5_sum_cmp(6592) **************( ~8 K' g# r& B3 l- v& C4 ^; E
11930:23:23 [wlan_adapter][Warn] [wlan_adapter_mt(6599)md5_sum_cmp] md5_sum_cmp [/tagparam/MT7916_EEPROM_MD5.txt] [/var/tmp/MT7916_EEPROM_MD5.txt]
& t; l$ W+ t; w( B11930:23:23 [wlan_adapter][Warn] [wlan_adapter_mt(6605)md5_sum_cmp] open /tagpar am/MT7916_EEPROM_MD5.txt fail!
9 q4 a( W& t& ? e* i9 W11930:23:23 [wlan_adapter][Warn] [wlan_adapter_mt(6592)md5_sum_cmp] *<3000000005 >11930:23:23 [KIGMPSNP][Error] [br_multicast_se(2800)br_config_mc_pa] dev_get_by _name error !
9 O4 B1 Z9 R& h6 X# g- L***********ENTER md5_sum_cmp(6592) *ethdrv_dev_ioctl ,brdev_set.port_id 0 ,brde v_set.name eth0 ,brdev_set.flag 0
, \: v3 v* _/ e% a$ _0 t*************
& q# E/ \( v1 l7 c! L3 V11930:23:23 [wlan_adapter][Warn] [wlan_adapter_mt(6599)md5_sum_cmp] md5_sum_cmp [/tagparam/MT7916_EEPROM_bak_MD5.txt] [/var/tmp/MT7916_EEPROM_bak_MD5.txt]
/ [# i- o/ R$ W5 O11930:23:23 [wlan_adapter][Warn] [wlan_adapter_mt(6605)md5_sum_cmp] open /tagpar am/MT7916_EEPROM_bak_MD5.txt fail!) l8 ^2 }9 m) X
11930:23:23 [wlan_adapter][Warn] [wlan_adapter_mt(139)checkAndSetEepr] md5_maste r_flag=-1, md5_backup_flag=-1
! a* n0 ^+ @& a: u11930:23:23 [wlan_adapter][Warn] [wlan_adapter_mt(174)checkAndSetEepr] /wlan/MT7 916_EEPROM.bin and /tagparam/MT7916_EEPROM_bak.bin md5 are not verify ok.0 L+ d# `7 m: x+ S* c4 X" _; ~
11930:23:23 [OSS_cspd][Warn] [oss_sche.c(897)RunProcess] RunProcess process[wlan _adapter] Event[0x1100] dwUsedTicks[289]
2 q1 P0 |. s: i8 q3 Z) @get regioncode 33010000# c& W p, c% I
11930:23:23 [ct_userinfo_mgr][Warn] [e8_ctuserinfo_m(3184)si_get_province] now i n func si_get_province_map
5 ? x& i8 j# Z) ]* O11930:23:23 [ct_userinfo_mgr][Warn] [e8_ctuserinfo_m(3214)si_get_province] Provi nce:BEJ% E3 C" ^8 w6 V2 ?: m) a3 ~
11930:23:23 [dss_mgr][Warn] [dss_lla.c(946)si_dss_lla_main] The Dss' lpMsg is nu ll.
- `+ I! {: l+ _3 f( I" G11930:23:23 [route_mgr][Error] [route_mgr.c(2255)si_db_init_defg] si_db_qry_defa ult_rt: no default RT- ^$ k+ e6 U& n/ N D8 y0 j
11930:23:23 [route_mgr][Warn] [route6_mgr.c(238)si_db_v6_init_d] si_db_qry_defau lt_rt6: no default RT/ `/ @: @% e' e6 w0 I. u
[pm_upmode_info_get] UpMod close uart!
0 p9 W! i P' `4 M2 T4 n9 v" o) y5 d: w; Y* P. |8 [6 k# `5 p3 \
- U; |7 m; X) O9 g0 @5 I |
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发表于 2024-12-29 19:12:31