输入用户名密码的时候一闪而过，来不及输入，按Ctrl+c或者D都不能中断
: j% }9 k# G( R! k* E) [- gSPI NAND. k q( g e o+ i
start read bootloader
- y1 P: u8 o" A7 _0 U6 Onon secure boot
9 j% u3 |1 i" j z- o! w+ }3 RJump
$ i4 _1 ^/ a& ^6 _/ a! Z
+ J0 J# X0 G$ P# `& kenter bootloader...8 } |0 o+ v& F4 `$ P8 }! L
pll init, cpu freq=1000 MHz
" T. a2 C$ C; X. f! X
0 u+ a0 w' I- }* T9 g9 t9 Ecrpm init ok
, Z2 L5 ] m9 L; mDDR3 16bit 1600 Mbps7 d" u, r7 `4 ~( U( k: @$ f
DDR3 size 0x20000000=512MiB$ y/ M) m/ b+ w4 @+ d
8 X$ f" C5 ^9 nddr init ok
r% [; \- h Q
- H" u; @' N8 R: _6 p. n' \9 }9 V& P, _* Q
U-Boot 2021.01-svn308776 (Oct 25 2024 - 18:28:46 +0800)
: s. A& Z9 g) y) E0 W6 j! q
' |9 p5 H. w9 P* \% X# X0 Y4 aCPU : ZX279133@A53x2,1000MHZ
- O- P* \2 u6 I$ l% ~( q9 [& sModel: ZTE 1331 g. p6 _4 x& v% `& i
DRAM: 512 MiB& q" A0 @9 m% u3 B
Relocation Offset is: 17f3c000, fdt_blob: 0x9f6efd40
9 c4 `2 o! {# [clk_register: failed to get sd_wclk_mux device (parent of sd_wclk_div), idx = 07 |) g5 z9 _, m% X5 @
clk_register: failed to get nand_xclk device (parent of nand_wclk), idx = 1: r9 P7 Q# W. h/ ?
clk_register: failed to get clk1376m_div device (parent of pon_core_clk_mux), id x = 24 T8 @. h) \4 @6 q8 p! _" n
clk_register: failed to get clk40m device (parent of pcie_25m_mux), idx = 3
3 p3 u0 T" p; m0 l! [1 f- [clk_register: failed to get pon_tm_aclk device (parent of tzc400_pon_aclk), idx = 4; G* T7 J3 |+ e* f5 u+ s5 z. b
vid is [2]+ C! O. B( R; [) U/ J0 ?$ V8 s: ~6 J
leds DTS probe by vid, successed
6 g' x ?( E) I4 ]$ g; s4 R8 H7 RDisable watchdog.! L8 d* R$ L0 [
el=3
2 T. J5 Z% U: w- r3 M @NAND: zs->cs_regmap 0000000000000000
* Q! i- R. g! e( j7 |. czx_sfc_probe: enter
3 W, G/ Y( ~- y( m1 M$ b& g: Bzx_sfc_probe: done% {; k! `4 S* Q! ]: t/ z$ o8 m
spi_nand spi-flash@0: READ ID data: ef-aa-22, Winbond SPI NAND was found.
7 u7 i: B" l+ t" B; v4 |2 Rspi_nand spi-flash@0: 256 MiB, block size: 128 KiB, page size: 2048, OOB size: 1 28
0 G6 n* {7 w5 m0 ^0 r7 E; |- ?spinand name:spi-nand0- D. P& O4 }' b9 C% [
Creating 15 MTD partitions on "spi-nand0":9 J: _+ F; N: K; F; x' q8 @
0 MiB
' S8 T6 K- R. X6 tLoading Environment from NAND... OK8 y4 H6 m6 Z( E8 F9 c! M
In: serial
3 h' O9 B1 f7 i: a; i4 G/ m8 [Out: serial0 c9 ]) S8 ~# q8 t" y ?9 ~# c
Err: serial
% D* c. B. T" N% h6 H) l$ e, qclk_pll env is not setted, core clk won't change
; G) ]1 C! H+ p: Eread partition others
% `! e6 H& f0 N% B0 A* NSize not on a page boundary (0x800), rounding to 0x8001 L" [+ Q$ l/ w0 L) `
Reading 2048 byte(s) (1 page(s)) at offset 0x00580000; P( Q. A& K. @8 N
[ERROR] SOFT VID(0x13300002) set failed, please set it again!& H, K0 V/ ^. j% |5 b3 O( n
vid is [2]
( k' Z% h9 J. u$ Senter outerphy info init!
# t4 |% u$ ?$ a' u- eget board_info_id by fdt,the phy_id is 0x2
+ f& B" o0 L8 bNet: rx data disable& K/ h" f! u# ~) C
The initial value of mdio_8226_id is 1.
3 [6 N$ Y, L* o) jinnerGeLedPolarSet 1
0 m) L$ b+ a$ winnerGeLedPolarSet 1
: h$ `9 r, s+ I! w/ c# w' hinnerGeLedPolarSet 1. d ]: f; t+ a1 B1 }8 V$ h
innerGeLedPolarSet 1( w; m* g' B/ F/ Z. k. k- a
mdio_miiphy_initialize ok
+ m( n8 {% l' A+ P1 aenter gpon pon pll cfg3 c9 `4 y, O5 N$ ~
mode_xgpon_nsyn_cfg_133
: }1 L, l O$ Q$ ]com_pll_lock_ready
. D- i/ b3 s( K$ I: Jrx los =0 rx data in
3 W1 d- l9 R; P# N6 U" kcdr_lock_ready
- B# s" d; u B1 ~/ ypon serdes init succeed3 N% \- E( z; C6 w) K
[get_dts_bosa_and_switch_ponmode_info] bosa_and_switch_ponmode_info=0x5200040.2 Q; {+ P: d4 ~4 A
[zx_pon_mode_init] switch_ponmode=0x40,multi_bosa_en=0x0,bosa_type=0x2.5 s, r! I. L% H, {, y0 h0 R [6 e
read partition others+ u5 Q3 K: Q: c! I
Reading 4096 byte(s) (2 page(s)) at offset 0x00000000
- n7 u8 G: b5 k, f[zx_get_private_profile_uint] pKeyName=skyregioncode value=307 tmp=0x00000133+ ?6 L5 ~0 b% `0 n, U
[zx_pon_mode_init]regioncode = 307
2 I/ `( t# Y$ V) T) [! Tread partition others5 x* T! W- i4 V! P' k& Q! y
Reading 4096 byte(s) (2 page(s)) at offset 0x00000000
/ D4 Y9 A* B; H, q3 V$ q[zx_get_private_profile_uint] pKeyName=factoryrestore value=0 tmp=0x00000000, C- d7 c+ ~( o' W/ |; K3 {
read partition others
5 H: F- z. g$ Z/ ^* K9 l x- SReading 4096 byte(s) (2 page(s)) at offset 0x00000000
! B$ @' u4 x$ m0 }5 |[zx_get_private_profile_uint] pKeyName=UpModeInfo value=64 tmp=0x00000040
, q9 r: S* Y- k3 I4 J[up_mode_get] UpModeInfo=0x40 ponmode_auto_en=0 upmode=0x40 lan_up_port=0 wlan_u p_port=0
& u1 n* C- g* B% ~[up_mode_check_verify] upmode=0x40 ponmode_auto_en=0 lan_up_port=0 wlan_up_port= 01 a( U+ `! M1 }+ I1 j, X; e
read partition others
0 J7 P) u, L4 @7 q( [5 T* P7 f2 xReading 4096 byte(s) (2 page(s)) at offset 0x000000005 f1 j) u/ M0 v7 S/ V \& ^6 |: L8 o& ~
[zx_get_private_profile_uint] pKeyName=UpModeInfo value=64 tmp=0x00000040
@% w+ ?! ^/ z$ o5 S# M4 |[modify_bootargs_UpModeInfo] UpModeInfo_str=UpModeInfo=0x00000040
: C1 k& x i+ v/ Feth0
& h4 Y5 _( S" } ^/ K+ k; hHit any key to stop autoboot: 03 b' U6 M9 M6 ]2 f o; r
read partition others
( n N: y8 `& m8 H; c! MReading 4096 byte(s) (2 page(s)) at offset 0x00000000! N7 g7 h" U2 [* F- p% o$ \! i
do_mcupg function enter..6 d! X$ q, t, S: Q1 N+ l X6 w
val =0xffffffff, reg = 0x192c0004+ j$ i, \: T; P! L5 o6 i# R
reset val =0xfffffffe
* O$ c+ {3 H% y+ srestore val = 0xffffffff
$ o# R) o) j+ D l" ]7 [read SOPC_CLR_OVER_READY_SMAC = 0x1, mac = 0x0/ l/ ?7 ]8 O5 D' x
write SOPC_SEND_EN_CFG_SMAC,mac = 0x0& d7 `) k1 l2 M3 U1 g2 @
val =0xffffffff, reg = 0x192c0004! F4 J) ^3 k8 H; A! M( E
reset val =0xfffffffd
; w1 \. f2 A5 {4 |7 @9 urestore val = 0xffffffff6 t7 G+ K" c- I$ }4 Q" ^) \
read SOPC_CLR_OVER_READY_SMAC = 0x1, mac = 0x1
. R/ \% {. N: i) n4 c% ewrite SOPC_SEND_EN_CFG_SMAC,mac = 0x1 s& B% T1 ^2 @ ?/ z" H! Z
val =0xffffffff, reg = 0x192c0004% Y; F) [4 D: w2 p, f$ I1 ~
reset val =0xfffffffb: E1 Q& ^2 Y5 f4 b$ G5 x
restore val = 0xffffffff' l7 n7 l0 k C) b
read SOPC_CLR_OVER_READY_SMAC = 0x1, mac = 0x2
+ ]3 p- k: ~4 `/ Q. m. s% cwrite SOPC_SEND_EN_CFG_SMAC,mac = 0x28 w& ?* Q/ h' F; T$ i
val =0xffffffff, reg = 0x192c0004% W/ R8 A; o# N; g
reset val =0xfffffff7
! X% N, k0 |3 z1 @restore val = 0xffffffff
m+ \- Q* g& I) pread SOPC_CLR_OVER_READY_SMAC = 0x1, mac = 0x3
; l% n f( g4 I- N2 z8 m, x7 F* o; Gwrite SOPC_SEND_EN_CFG_SMAC,mac = 0x3
o# N% ~' G1 @enter outerphy info init!
1 {# b! }; g3 j5 D6 Vget board_info_id by fdt,the phy_id is 0x2) [0 [6 }/ n, u( ]/ L
[outerphy_phy_init]Warning: No outerphy on this port<6>
1 \2 W: J) O8 M0 ]5 T# ]enter outerphy info init!+ ?9 g8 y: e3 }
get board_info_id by fdt,the phy_id is 0x2
. o- R K/ G7 Y1 I8 S) t2 M--->phy identifier is [0xc849]& \) F Z' _/ i ?6 {
5 serdes option is 05 F" h8 I' X; C/ V
xmac0 is used.& {& e( c( Z' Q* n- W
enter outerphy info init!
' q { j: H8 X/ a# T% aget board_info_id by fdt,the phy_id is 0x24 O& w9 z1 O% P# L, z- w
can't find this index!
* l4 U/ p% Z1 x) M- j[outerphy_phy_init]Warning: No outerphy on this port<5>+ e% Q4 ^8 ]% a J! P3 P
idm_ddr_base is 0x00000000b0000000
& m4 [' w# x5 Y' W5 l2 Q5 F/ Yenter gpon pon pll cfg
7 J& T: p A {2 G6 _6 N) F: imode_xgpon_nsyn_cfg_133! c' C: \; R& X, _4 y
com_pll_lock_ready
/ G$ B, C4 _( o. H4 _rx los =0 rx data in+ W( A: d- T2 b' j
cdr_lock_ready
5 [& V1 G+ C* L* M. x3 Fpon serdes init succeed( _+ l/ B% R# G4 a, l
np init ok3 V1 M7 {8 y' u) n+ Y- X3 h
mac 0 link down
+ C. n! H; q) n! X, i, ?" Imac 1 link down
1 ?! n5 C5 _+ q1 Tmac 2 link down. ?- E N4 Y/ }7 }$ _& `: L
mac 3 link down$ Y1 Z" v3 C- Q- B0 A
mac 4 link down
; c3 B, _( k5 t; f P) smulti upgrade check timeout.
0 Z; I& d7 g' n; D% V+ hReceive multicast packet failed (>.<): \2 C) n1 J& b, ~! `6 ]/ B
read partition others
6 E! u" D/ s: s" k3 c! CReading 4096 byte(s) (2 page(s)) at offset 0x00000000
. `' L+ k% M. n- X3 \) M8 TBootImageNum=0x00000000,0
+ f% t) k. T/ J& i/ q# Dname is kernel0,offset is 0x200000 z) l( S$ f7 M1 H2 n2 ~, U
read partition kernel0
5 V- C0 j/ `: f4 O2 T3 dSize not on a page boundary (0x800), rounding to 0x14ae0003 C2 Y: ?7 S7 F4 i" @$ b7 q
Reading 21684224 byte(s) (10588 page(s)) at offset 0x00000000
+ ` e2 F0 p. Q: [2 x% K4 ufind kernel0 flash entry is 0x200000% G8 R* U/ y, Z
read partition boot9 i2 ~7 _1 ]! U. G- e( b
Reading 1572864 byte(s) (768 page(s)) at offset 0x00000000
, M) w5 R+ ^8 @) `) j/ [set bootargs,str is console=ttyAMA0,115200n8 rdinit=/sbin/init U-Boot 2.0.0 2024 1025183308 0x200000 0x0 0x83 0x83 UpModeInfo=0x00000040% [( h, |( j' Q( @
set bootargs,str is console=ttyAMA0,115200n8 rdinit=/sbin/init U-Boot 2.0.0 2024 1025183308 0x200000 0x0 0x83 0x83 UpModeInfo=0x00000040 regioncode=0x133
. J' [1 v1 K9 `Saving Environment to NAND... Erasing NAND...0 I! ~. c i9 o D
Erasing at 0x1c0000 -- 100% complete.$ b1 b: [" x- Q. a1 G" e, B
Writing to NAND... OK) F% c* @, l7 B% [ z# k
OK
4 Q, h. E" L' t2 E' Bconfig string: #conf@1337 f9 R$ u# b5 t2 I
## Loading kernel from FIT Image at 88000000 ...
: \& j) U2 O$ S+ D3 w% S Using 'conf@133' configuration8 l9 j( x! g% Q' X
Trying 'kernel@133' kernel subimage
5 G6 X2 }' `; K D4 w+ x/ w Description: Linux kernel for 133
$ u& G# X' f& ^, `! B- z- V Type: Kernel Image
! \ J3 D) l' Q3 [ Compression: gzip compressed( \! R) `3 q8 ~. N
Data Start: 0x880000f4* s3 N3 i1 X! D/ t5 c
Data Size: 4815863 Bytes = 4.6 MiB
1 _) J" V4 Q9 L Architecture: AArch648 j$ j. L% l7 `( |3 z" g! ]
OS: Linux
2 @% H* o% ] k0 j5 M Load Address: 0x80080000- S$ d) k Y5 e3 A8 L) Q9 M
Entry Point: 0x80080000
8 g [+ m2 u+ z2 _ Verifying Hash Integrity ... OK
6 A$ x$ B! ]# l* h" J: W/ M, F## Loading ramdisk from FIT Image at 88000000 ...
- ?. A! j5 I$ m4 A0 k4 {* o Using 'conf@133' configuration2 g6 ^/ j) ]! v- [/ \ u# s# C
Trying 'initramfs@133' ramdisk subimage
2 I2 X) z- O$ f; e6 ?) l, e6 Y Description: initramfs for 133) E" j5 `" |. W
Type: RAMDisk Image
& h& w7 G9 T7 k! B Z; I Compression: lzma compressed2 k% u3 A4 a" T: _' z: V( K2 i
Data Start: 0x884a3f24, m* i# [ h. ?$ l# @
Data Size: 16815245 Bytes = 16 MiB/ k# ^, S7 K1 H) H
Architecture: AArch64$ y; A8 y' ]! I4 s! J2 r* ^
OS: Linux1 _: I2 X8 \, z$ _
Load Address: 0x00000000
, h, F% M: b* B4 q# Y6 `; ^ Entry Point: 0x00000000
& a2 y( H7 s! ?) M' b) q$ N Verifying Hash Integrity ... OK
0 \; n; c/ i: h+ D3 mWARNING: 'compression' nodes for ramdisks are deprecated, please fix your .its f ile!
: Y' u- A% s5 B5 L8 n## Loading fdt from FIT Image at 88000000 ...
V' D% C% A' G8 ` Using 'conf@133' configuration2 V- y0 T& e) h4 B; h
Trying 'fdt@133' fdt subimage$ a! W" Z. l j5 p; {6 i: d
Description: Flattened Device Tree blob for 133! \/ B1 I. `9 v* v# Q4 e5 Y
Type: Flat Device Tree2 d6 n- F* L. K) K9 Z- L
Compression: uncompressed- Q$ f: t' w; q2 g' Y, R! ]
Data Start: 0x88497dc86 | _: a* u8 B0 q* v
Data Size: 49307 Bytes = 48.2 KiB1 a6 j3 v0 [1 U1 ]
Architecture: AArch64* Z6 M7 [7 X& |5 X7 O3 @
Load Address: 0x820000007 g2 i. @( K% i- l3 z$ h$ Q I- I+ G
Verifying Hash Integrity ... OK' f5 ~6 h( C3 B; T) ?1 _
Loading fdt from 0x88497dc8 to 0x82000000
3 f5 w9 }5 ^& A7 M' Y Booting using the fdt blob at 0x82000000
6 a& L7 V& w5 y( w4 G" x Uncompressing Kernel Image/ p! F; w- z& F5 {; I
Loading Ramdisk to 9dff2000, end 9effb48d ... OK; h' r3 X, A T! O* t7 x
Loading Device Tree to 000000009f6de000, end 000000009f6ed09a ... OK
3 M+ k9 G7 K2 O1 V8 Q% Z1 d) Mft_board_setup
3 |% c- j" h% nft_fixup_flash spi-nand0
: M% R3 H0 l; p, Kft_fixup_flash-spinand# d, N4 X' }- }6 A& u. J! F. G
8 D- |, D+ d0 i! v. B
Starting kernel ...
* @5 s7 U# |) w: {- R- c3 |. x" D
& z/ e( s: J1 ICPU0: Set slave cpu addr = 0x00211A8C
6 L, D/ v/ U' f: bSLAVECPU: Cpu = 00000001 online successfully in psci!
5 d& V" L8 z# D) S yinit psci ok!!
: n, r B* _4 J/ i* C" m; b! K& i" nCPU ON: Target cpu = 00000001 entry = 0x8072B1E0* \& i0 S+ n \5 [
CPU1: Jump to linux kernel entry = 0x8072B1E0& F; ?: o% o! I: C
Booting Linux on physical CPU 0x0000000000 [0x410fd034] p2 U8 W2 n3 H( n
Linux version 4.19.136+ (chenmengxue@skyworth) (gcc version 5.3.1 20160412 (Buil droot 2017.05)) #4 SMP Fri Oct 25 18:33:08 CST 2024
; i5 r6 w& v. F+ K& `5 {/ [Machine model: ZTE 133
! k; d, y2 k. x j5 qzx_resv_mem: base 0x0000000080b23000 vbase 0xffffffc000b23000 size 0x3245000; V1 W# `2 m2 z& j
OF: reserved mem: initialized node pon_rsvmem, compatible id zxic,resv-memory
8 {- i; l/ z. ?2 v. @7 j# Rpsci: probing for conduit method from DT.
& N8 B- \% [% upsci: PSCIv1.0 detected in firmware.% f5 U- \: z0 j
psci: Using standard PSCI v0.2 function IDs" ], @! ?8 E, A* s2 n
psci: Trusted OS migration not required/ [ l( \& e- Y9 F( w' c
psci: SMC Calling Convention v1.0
; Z; S& x# h" v" q' urandom: get_random_bytes called from start_kernel+0xb0/0x414 with crng_init=0
4 v* g! g9 P& S/ [6 jpercpu: Embedded 48 pages/cpu s157016 r8192 d31400 u196608
1 N8 P. q/ C+ rDetected VIPT I-cache on CPU0% i5 E i# l2 D8 H
CPU features: enabling workaround for ARM erratum 845719' f/ Q; ^2 A& K! U; p
Built 1 zonelists, mobility grouping on. Total pages: 129024
" J7 z% G! K2 X+ o5 ~) @$ l& ]Kernel command line: console=ttyAMA0,115200n8 rdinit=/sbin/init U-Boot 2.0.0 202 41025183308 0x200000 0x0 0x83 0x83 UpModeInfo=0x00000040 regioncode=0x133
3 l, M5 W) v6 Fzxic : zxic_cmdline_console : ttyAMA0
% P+ l0 C0 d( m8 \[init_up_mode_info] g_UpModeInfo=0x40
0 J( _3 e% b5 i- v& U4 \[init_regioncode] g_regioncode=307
/ P8 q/ g) _" \- |6 pDentry cache hash table entries: 65536 (order: 7, 524288 bytes)
1 `, p$ D# k- x& AInode-cache hash table entries: 32768 (order: 6, 262144 bytes) f! ^. X- G2 J% A7 o+ z0 [# A
Memory: 403064K/524288K available (6846K kernel code, 506K rwdata, 2380K rodata, 640K init, 441K bss, 121224K reserved, 0K cma-reserved)+ D! N; h2 {, A+ h
SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=17 ]2 {$ c5 \% R0 Z5 ^7 G) e4 ]
rcu: Hierarchical RCU implementation.. U) l- \4 d+ z+ g9 \
rcu: RCU event tracing is enabled.
% N* q& L% v! h) b) Z- Q- T ~rcu: RCU restricting CPUs from NR_CPUS=4 to nr_cpu_ids=2.4 a, }3 }( c. x" b. b9 V+ y6 G+ T
rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=2
! r' ~1 R: O5 p: Q ?NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
' s) ^. w5 W) I% SGICv3: Distributor has no Range Selector support( c- P6 t0 P1 m0 E" Y
GICv3: no VLPI support, no direct LPI support
5 v$ O, `2 u; tGICv3: CPU0: found redistributor 0 region 0:0x0000000000540000
4 Y9 k. q# n" t7 rclk_common: pll_2000m_clk:register pll7 _% {3 p9 v) n. ?( q/ i
clk_common: func of_zx_clk_parse_pll nr rate is 11& _; [0 d& w7 N \8 R4 h9 C
clk_common: pll_2000m_clk:no paticular pll-enable-register, use default cfg reg
% f7 x ]3 u3 ?* }/ v; cclk_common: pll_lsp_2000m_clk:register pll
7 N* k i* U' n# Y" U! }% K# Qclk_common: pll_lsp_2000m_clk:failed to find property zx-clock,pll-en-bit2 R: M" O% i C- Q, Q
clk_common: pll_1376m_clk:register pll
, e0 v) i8 h: _+ ^clk_common: pll_1376m_clk:failed to find property zx-clock,pll-en-bit$ V) N& a+ z& k, \: D) }
clk_common: pll_fpp_2500m_clk:register pll
# y' L/ i3 i4 J9 s/ N6 S& u; Vclk_common: pll_fpp_2500m_clk:failed to find property zx-clock,pll-en-bit
% I, Q b* g' H( B8 E! \arch_timer: cp15 timer(s) running at 25.00MHz (virt).
2 i7 C, O' ]( E! rclocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x5c40939b5, m ax_idle_ns: 440795202646 ns6 Q" N; S' [4 @
sched_clock: 56 bits at 25MHz, resolution 40ns, wraps every 4398046511100ns
8 G3 X; D3 G- U! |- U: F* ^Console: colour dummy device 80x25# a# {6 Y8 {$ g$ h0 Y8 Q3 F" @" p+ l
Calibrating delay loop (skipped), value calculated using timer frequency.. 50.00 BogoMIPS (lpj=250000)
5 |9 N+ A9 K5 q2 Y6 hpid_max: default: 32768 minimum: 301$ z5 T* t( a* `- N
Security Framework initialized
# B. [: u# q- `% pMount-cache hash table entries: 1024 (order: 1, 8192 bytes)' o: V$ L! [) J
Mountpoint-cache hash table entries: 1024 (order: 1, 8192 bytes)5 @% O/ I, X% k7 I8 a+ T
ASID allocator initialised with 32768 entries
) a# b8 g8 A$ Y0 J4 F9 q0 M9 g2 V" wrcu: Hierarchical SRCU implementation.4 q7 E V! U% J; ~" U7 e
common ,zxic_early_init
' k6 _- z/ f$ _8 `smp: Bringing up secondary CPUs ...# ~( ~% U7 ?3 w, c( G- m
Detected VIPT I-cache on CPU1. |; \& T5 S& f+ ?
GICv3: CPU1: found redistributor 1 region 0:0x0000000000560000, i3 {1 g: F0 z0 r
CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
6 Y5 O& j) G0 w B& msmp: Brought up 1 node, 2 CPUs; [, d$ X& C! O- u, j3 X' `% z
SMP: Total of 2 processors activated.( ?" ?0 k. {7 A, F- \" d
CPU features: detected: GIC system register CPU interface. Y) c8 h# Y8 L/ ?5 J4 G
CPU features: detected: 32-bit EL0 Support
% c( t1 I+ m% d+ b! e: E, T2 ^; eCPU: All CPU(s) started at EL17 _/ a. [$ K% ~$ _
alternatives: patching kernel code
2 U3 u X" I( `+ V8 n" \0 s) Kdevtmpfs: initialized" a, K3 C2 d! ?; h9 g
clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 1911 2604462750000 ns! |0 ?# q. b1 c2 Y5 s
futex hash table entries: 512 (order: 3, 32768 bytes)$ r* i1 \3 A* W% d+ {6 s
pinctrl core: initialized pinctrl subsystem5 @' S2 H1 O' q; ]8 G9 _
NET: Registered protocol family 169 l; Y! x& y- p3 V" r2 d# T/ ~
cpuidle: using governor ladder
$ g& v T" V1 ?2 J. Ghw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
' p2 q! p- K$ d! yDMA: preallocated 256 KiB pool for atomic allocations
) a! }* g' T1 c8 e7 m& i& U7 mSerial: AMBA PL011 UART driver( \+ D( L' L) P' \5 e( d5 B5 e
zx reset init
( x' }0 w( R. v( p- j. p8 [2 \3 Bzx2967-reset 10e10060.toprst: reset controller cnt:32
4 p' `& s# r1 g B$ A. z4 o) Jzx2967-reset 10e10070.localrst: reset controller cnt:643 R* S. e' x% X% ^) m0 l) F" l& P
zxic-pinctrl 10e20000.pinctrl: invalid pin list in gpio-range node
) p; @7 O0 I czxic-pinctrl 10e20000.pinctrl: invalid pin list in bank-range node' H3 d+ E O {7 H" b9 [
10d0d000.serial: ttyAMA0 at MMIO 0x10d0d000 (irq = 16, base_baud = 0) is a PL011 rev11 T0 W' K8 X4 h# X v0 P- M+ @7 E3 R. q
console [ttyAMA0] enabled" ?" Z& U# G- }
zte-msi 1f400000.msi: zx pcie msi probe enter!!!!!!
( f% W1 \! C1 F0 tzte-msi 1f400000.msi: parent_node->name : interrupt-controller
0 U: m s% ~$ a- @9 n1 Kzte-msi 1f400000.msi: parent->name : :interrupt-controller@00500000-19 G1 N; q2 K. Z& T; T u. b2 s. f
zte-msi 1f400000.msi: zx pcie msi 1 initail!!( G; Y" G" q' J! X6 J8 k
zte-msi 1f400000.msi: dbi_base : 0xffffff8009400000
1 {' Z# _/ M; i; l! W: Mzte-msi 1f400000.msi: vector_phy : 0x10e000049 a0 k* t0 H/ T) a
zte-msi 1f400000.msi: num-vectors : 0x20
& U- m* O/ ^2 {6 q4 N4 d7 m& ezte-msi 1f400000.msi: status-of-woe : 0x0
& v+ w1 g, M) q6 k) v0 |zx-efuse 14f11000.efuse: efuse init ok, clock rate = 250000001 s6 F: r& v) c3 r* s
vgaarb: loaded ^6 E* m9 s9 ~, Y2 n* j0 A
SCSI subsystem initialized
4 w( J4 N- \" d) V% z2 m: i2 _usbcore: registered new interface driver usbfs1 h3 k, T& E" J: k. @5 z
usbcore: registered new interface driver hub5 h$ k6 I# j, a$ M
usbcore: registered new device driver usb7 ]. f6 w' T) J; M/ U# Z& u
clocksource: Switched to clocksource arch_sys_counter) ?* } ?; u# {+ q0 ?
VFS: Disk quotas dquot_6.6.0! g3 w/ z& U( v5 U8 {
VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes). `. f( x W! _( l4 s ^0 Z* e3 J' E
zx_gpio 10d10000.gpio: ZX GPIO chip registered
) Q5 u) ^) ]8 [# ~0 J5 Vvid is [0]
! q, _6 p% r" r Hzx_gpio 10d10040.gpio: ZX GPIO chip registered
2 R* i4 Q% i! r/ D$ ^vid is [0]3 y: x7 ^# N! Z4 g) x% l
zx_gpio 10d10080.gpio: ZX GPIO chip registered
( {+ p. |; \7 {% Jvid is [2]* A* w/ |& W3 M9 ]) b
zx_gpio 10d100c0.gpio: ZX GPIO chip registered
6 C- L/ l( S: ]9 h( X# n* [vid is [2]
. l5 E, N5 Z b8 n% A: I8 f: c1 Czx_gpio 10d10100.gpio: ZX GPIO chip registered
" `$ H5 z6 y. J( F# }9 b) z. U/ ~vid is [2]- f$ C3 ]) [& @( p Y2 v r
NET: Registered protocol family 2) o d( D9 t, V q/ ~; C0 ]3 o
tcp_listen_portaddr_hash hash table entries: 256 (order: 0, 4096 bytes)1 Z3 r4 k- s9 _# G- p2 |$ o
TCP established hash table entries: 4096 (order: 3, 32768 bytes)$ Z/ x+ Q' h F7 i/ {! c5 K7 Q
TCP bind hash table entries: 4096 (order: 4, 65536 bytes)
0 L& T' ~( f1 mTCP: Hash tables configured (established 4096 bind 4096)
+ D) ?+ ]5 c; u! K U6 |UDP hash table entries: 256 (order: 1, 8192 bytes)
7 @- e5 y# P, m! uUDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
+ v- X" d8 l7 C/ gNET: Registered protocol family 15 g- h! w, r5 g) I( V; _" n* H) G
Trying to unpack rootfs image as initramfs...7 y' P! w& p* m
Freeing initrd memory: 16420K
* K$ S3 K q( XInitialise system trusted keyrings
+ [7 {" @$ Z; f: W/ m" E- k4 [. J+ eworkingset: timestamp_bits=46 max_order=17 bucket_order=0' P+ e' @7 a) {" {
exFAT: Version 1.2.9
) |: B. f3 h# b7 Q! V5 }Key type asymmetric registered
% _2 E( }: r4 RAsymmetric key parser 'x509' registered& `/ x2 z! {) ?; X$ q( D7 x: D1 a
io scheduler noop registered8 t! u; I# |/ |: [9 f
io scheduler deadline registered5 e& b* ?1 F1 J: m* o; U
io scheduler cfq registered (default) c0 Q2 g; o* O: R" k
io scheduler mq-deadline registered! J+ [6 n# e1 n6 |4 b: ^
io scheduler kyber registered
4 F8 J& M" W8 O# rinterval tree insert/remove" y" j; [! v2 X
-> 884 cycles
: i( p2 }; O4 J4 @+ E/ Vinterval tree search. E4 S! a6 M1 u x, j- H n6 n
-> 5278 cycles (2692 results)
: Q: O+ _, U7 Q0 |zx_spi_probe: enter
" U6 J+ r, J' r& w. zzx_spi 14f06000.ssp: Failed to request TX DMA channel3 x+ w3 b9 j1 N) \9 i* s
zx_spi 14f06000.ssp: Failed to request RX DMA channel
7 C0 |* X6 Q: g, @1 Y# _2 Rspi spi0.0: zx_spi_setup: mode 0, 8 bpw, 500000 hz' y' l* B& e8 M) d! }
zx_spi 14f06000.ssp: set rate to 961539
3 g' E. b6 o2 }/ `0 Uzx_sfc_probe: enter$ ]% l% X6 H" e+ V* ?7 ]
zx-spifc 10d0f000.spifc: spifc rate is set to 125000000
1 ]* k) p9 V3 w0 p+ szx_mdio 14f01000.mdio: mdio not set pins
9 f+ w3 d8 q H' H) w0 N% O& E- ^4 fzx_mdio 14f01000.mdio: Cannot found phy-power property in mdio
) [; s1 J/ e8 c$ ]zx_mdio 14f01000.mdio: MDIO id = 0, clock = 2500000) [, ]# l$ D4 p7 p/ f: C6 u
zx_mdio 14f01000.mdio: MDIO probe success!4 z+ M- \9 n. t! v1 |! A% n. {7 \
zx_mdio 14f02000.mdio: MDIO id = 1, clock = 2500000
: ^2 _5 u* N- ?: [zx_mdio 14f02000.mdio: MDIO probe success!
& b: D, U* y M4 n$ Q. K; I) `zx_i2c 14f03000.i2c: zx_i2c_probe& i% v) Q1 v* {) T v* E: T6 O& f2 J
<drivers/soc/../../../../../component/linux/common/i2c/i2c_zx.c> before i2c_add_ numbered_adapter i2c->adap.nr is -1
. s: a1 y+ @& q' r. u {, ]<drivers/soc/../../../../../component/linux/common/i2c/i2c_zx.c> adapter_id is 00 K. Z, I- s5 F' E
<drivers/soc/../../../../../component/linux/common/i2c/i2c_zx.c> after i2c_add_n umbered_adapter i2c->adap.nr is 0! `* H1 M; g% g/ j9 d/ D
zx_i2c 14f03000.i2c: clock rate is 25000000- f( s+ N' k" \! P7 ~3 m7 w3 {" D
zx_i2c 14f03000.i2c: zx i2c0 probe succeed.
, W; z. Q3 N1 L! A: J& \7 Mtdm registered!
5 k$ t( u* w, o7 v# V1 j+ h( A4 Z- uzx_tdm2.0_probe!
* q7 j; i2 E4 J, m8 p wg_tdm_buf =(____ptrval____),9f138000
( i" v7 P2 h& n! R" Ctdm irq=28- J( F! j! ^4 o# v! u
tdm binding cpu1....
; I: u* ?# C% i. y6 Ktdm softirq
. G$ \ W+ |9 F7 I3 H6 y/ Czx_axi_tdm_setup* G: `9 q0 c) b$ [. j% K2 R
zx-pwm 14f10000.pwm: zx_pwm_probe done.( V" Q* o1 v) d/ b
zte,zx27913x-pcie 15200000.pcie: zx pcie probe enter!!!!!!
( S* b+ S; _: b0 N [3 u5 ^zte,zx27913x-pcie 15200000.pcie: Link down work initialization completed
. n# Y0 |0 K1 r) B0 xpcie@15200000:Initialize pcie's phy!!!+ E4 D7 P! b- [# T. G6 Q! q
pcie@15202000:Initialize pcie's phy!!!) L6 H- o H6 Q/ {4 K3 g6 b
random: fast init done
- ?: U: \. F. i$ c2 |% r. k' ?" i! Bzte,zx27913x-pcie 15200000.pcie: host bridge /soc/pcie@15200000 ranges:
3 e, T: W8 L# @zte,zx27913x-pcie 15200000.pcie: IO 0x2f000000..0x2f0fffff -> 0x2f0000007 b8 D# b$ F6 g t
zte,zx27913x-pcie 15200000.pcie: MEM 0x20000000..0x2effffff -> 0x20000000
' ?1 e; v( {7 B2 ]& R. Mzte,zx27913x-pcie 15200000.pcie: dbi_base = 0xffffff8008e25108 link up val = 0x 51
, K0 l9 Q. {6 H7 Z- s( I" Dzte,zx27913x-pcie 15200000.pcie: Link up, speed reg = 0xb01200006 d! W1 d" T& L5 ~: h* u
zte,zx27913x-pcie 15200000.pcie: PCI host bridge to bus 0000:008 B* i" a6 N( \- U' d
pci_bus 0000:00: root bus resource [bus 00-ff]
/ x1 w6 l3 Y0 x+ N+ Rpci_bus 0000:00: root bus resource [io 0x0000-0xfffff] (bus address [0x2f000000 -0x2f0fffff])
; Z) I `) g( Z- U9 D" g7 npci_bus 0000:00: root bus resource [mem 0x20000000-0x2effffff]+ r: o: E; i, a/ {+ b; m8 z
zte,zx27913x-pcie 15200000.pcie: enable MSI ok
( K: ^# L! h9 N; a# H5 F* {6 lpci 0000:00:00.0: BAR 0: assigned [mem 0x20000000-0x200fffff]% G) n- `$ T5 e3 f0 {. M& M; X
pci 0000:00:00.0: BAR 8: assigned [mem 0x20100000-0x201fffff]( n# M# ^2 V+ H; [% N
pci 0000:00:00.0: BAR 9: assigned [mem 0x20200000-0x203fffff 64bit pref]# Z: F Q) z/ ]* V' N) y6 }
pci 0000:01:00.0: BAR 0: assigned [mem 0x20200000-0x202fffff 64bit pref] w& e, m8 L. f0 S0 G
pci 0000:01:00.0: BAR 2: assigned [mem 0x20100000-0x20107fff 64bit]
: o8 ~4 J; ~1 {0 Z1 d. n7 \: g1 q7 upci 0000:01:00.0: BAR 4: assigned [mem 0x20300000-0x20300fff 64bit pref]
1 Q' F( e* {, Z: ?4 Zpci 0000:00:00.0: PCI bridge to [bus 01-ff]9 n7 Y9 g f4 _* H
pci 0000:00:00.0: bridge window [mem 0x20100000-0x201fffff]8 r0 J9 A) I- ]0 C! P! c. Z% K
pci 0000:00:00.0: bridge window [mem 0x20200000-0x203fffff 64bit pref]2 g1 ]) w; O9 {9 ~6 v0 T
pcieport 0000:00:00.0: Signaling PME with IRQ 32
? I) H0 K. r, u9 Cpcieport 0000:00:00.0: AER enabled with IRQ 326 S, [' ~& f4 x* s8 @ J# r* g
zte,zx27913x-pcie 15200000.pcie: Request pcie link down irq [25] ok" a5 o" [. d# @- X8 j
zte,zx27913x-pcie 15202000.pcie: zx pcie probe enter!!!!!!
# W$ u. H4 p- c% }1 uzte,zx27913x-pcie 15202000.pcie: Link down work initialization completed8 _" A7 E/ J$ [9 {4 r K+ a
pcie phy has been initialized !!!!!!8 e" e: l- a" [! U7 b% r
zte,zx27913x-pcie 15202000.pcie: host bridge /soc/pcie@15202000 ranges:" g5 B9 [- v# X+ n
zte,zx27913x-pcie 15202000.pcie: IO 0x3f000000..0x3f0fffff -> 0x3f0000008 \6 D, V1 Z8 ^% c5 f! w
zte,zx27913x-pcie 15202000.pcie: MEM 0x30000000..0x3effffff -> 0x30000000
7 ?7 t n0 F8 ]4 f, v1 ^7 azte,zx27913x-pcie 15202000.pcie: dbi_base = 0xffffff8008f33108 link up val = 0x 518 J+ b& E ^4 I7 z! P
zte,zx27913x-pcie 15202000.pcie: Link up, speed reg = 0xb0120000$ S1 K' Y1 U% w1 J- P* O
zte,zx27913x-pcie 15202000.pcie: PCI host bridge to bus 0001:00
, G( R* H& ?3 G$ tpci_bus 0001:00: root bus resource [bus 00-ff]% u6 ~& N3 n: Q- e
pci_bus 0001:00: root bus resource [io 0x100000-0x1fffff] (bus address [0x3f000 000-0x3f0fffff])
! }; C& c. I2 d0 F( Ypci_bus 0001:00: root bus resource [mem 0x30000000-0x3effffff]$ S- g- ]! f) Z$ H& b L2 \
pci 0001:01:00.0: 4.000 Gb/s available PCIe bandwidth, limited by 5 GT/s x1 link at 0001:00:00.0 (capable of 8.000 Gb/s with 5 GT/s x2 link)
/ E* l! P+ ~& n1 b. ]$ Vzte,zx27913x-pcie 15202000.pcie: enable MSI ok
, k6 j8 d* j" t: Kpci 0001:00:00.0: BAR 0: assigned [mem 0x30000000-0x300fffff]4 A8 I; Z$ Y0 a' V
pci 0001:00:00.0: BAR 8: assigned [mem 0x30100000-0x301fffff]
! O! K b8 _, R# Vpci 0001:00:00.0: BAR 9: assigned [mem 0x30200000-0x303fffff 64bit pref]- {) o8 B8 e$ l- _! Q
pci 0001:01:00.0: BAR 0: assigned [mem 0x30200000-0x302fffff 64bit pref]
$ v( s7 B# S2 r* e2 r( p7 d/ F- vpci 0001:01:00.0: BAR 2: assigned [mem 0x30100000-0x30107fff 64bit]1 f. k8 i& g# D, A* c; c; h
pci 0001:01:00.0: BAR 4: assigned [mem 0x30300000-0x30300fff 64bit pref]3 N+ E2 ]4 r6 o& L! E
pci 0001:00:00.0: PCI bridge to [bus 01-ff]) X" m# y0 i7 @ x ]3 v9 a2 l" W5 n
pci 0001:00:00.0: bridge window [mem 0x30100000-0x301fffff]
& Y, x: j; L: r j( `pci 0001:00:00.0: bridge window [mem 0x30200000-0x303fffff 64bit pref]& R4 D# m7 X/ H M
pcieport 0001:00:00.0: Signaling PME with IRQ 34/ ]+ t' f( b# H
pcieport 0001:00:00.0: AER enabled with IRQ 34( K& L$ F. C# {( ?
zte,zx27913x-pcie 15202000.pcie: Request pcie link down irq [26] ok
. H/ h3 c1 S u5 Rzx_pvt_sensor_cln22ulp 10e70000.pvt: Enabled with temp 0x11e& B" C3 f; c5 l2 ]
zx_thermal_init end
- U a7 V- h( w( q: ezx_pvt_sensor_cln22ulp 10e70000.pvt: probe ok, clock rate: 1190477
* R' A* `- D2 r$ B! t4 y<pdt_wdt_init>(485):create proc files for watchdog!!!
( @/ C( s- |9 `0 A3 x" t M$ Z<pdt_wdt_init>(490):Starting Watchdog Timer.... c6 h, g2 f L+ v9 x6 k& t1 ?3 }
wdt debug: nr_cpu_ids= 2( s0 N! J, Q5 ~2 }5 Z( d9 p# s! I, _
zx_wdt 14f09000.wdt: zxwdt[0]: heartbeat 8 sec, clock 2048! H9 |% Y( s: D
<pdt_wdt_init>(490):Starting Watchdog Timer...
4 a8 J% E5 L! j7 e0 Iwdt debug: nr_cpu_ids= 2! o; q- f- a, W
zx_wdt 14f0a000.wdt: zxwdt[1]: heartbeat 8 sec, clock 2048
- I d# c4 Z D- j+ V1 G8 H3 q<pdt_wdt_init>(490):Starting Watchdog Timer...3 _+ }& i: O% ^1 J
wdt debug: nr_cpu_ids= 2
' h0 i' i2 v8 g* y- qzx_wdt 14f0b000.wdt: zxwdt[2]: heartbeat 8 sec, clock 2048
2 o: b, B+ s& @* Y<pdt_wdt_init>(490):Starting Watchdog Timer...
( L; S) ?& E7 [9 N8 Xwdt debug: nr_cpu_ids= 2
2 ]. J$ P; M, E& n6 Gzx_wdt 14f0c000.wdt: zxwdt[3]: heartbeat 8 sec, clock 2048; e& D) m& I+ _8 c( ~( r
success to get board info5 I- {4 z! c. N! o6 ~) a1 \" X; b
success to get cpu info& S7 j( q- t5 b# ~9 N$ |8 |
success to get port info
4 H) c! F6 }" C9 wsuccess to get enet info' o/ T5 I: S0 f+ a
success to get optical info1 J9 C5 S/ |9 x1 P3 \) j2 h) W
zx_board soc:bdinfo@0: Property 'pots_info' cannot be read, ret: -22.
! k) t! a8 X) k4 e& Y0 a2 }7 zsuccess to get pots info
% |: s# M! Z0 I. c" R5 Jsuccess to get ge info
! g' M0 V- ?0 p- f9 ythe count of outerphy_desc is 3!+ Q G* h3 p. P/ d8 O0 p
the outerphy_mode of outerphy_desc: 0!
; P; E! u6 l) x( t2 ophy_name:[]_[0]
. G. Y+ N% B% u4 M W! a+ S8 F0 Rthe outerphy_mode of outerphy_desc: 0!
5 d8 c+ X# P l; pphy_name:[phy_RTL8226]_[1]
. G6 r! \6 A( |; uthe outerphy_mode of outerphy_desc: 0!; x. ~7 a& K0 D I% r! |( N
phy_name:[]_[2]& [# Z/ A) A+ k a% t( P
success to get outerphy desc info
) a+ r: v7 F% F6 J% u2 Rzx_board soc:bdinfo@0: vid: 2, name: TDY09, zx board probe ok.3 v5 Z0 s( D; n& Q
success to get board info" u, n; V( v3 i8 D: H* c& M6 ]7 L
success to get cpu info
7 B' I" K3 _9 F6 u% j1 y3 Gsuccess to get port info9 q/ [# ?% o( G8 S$ L( O" F# L
zx_board soc:tdy0a_4@0: Property 'vid_list' cannot be read, ret: -22.# X5 k, `7 v0 J% I0 g8 W& e+ z% s6 ]
success to get enet info
+ E+ S0 D* t& ksuccess to get optical info1 `9 ]3 S# H) m q5 V3 J+ W) ?
zx_board soc:tdy0a_4@0: Property 'pots_info' cannot be read, ret: -22.
: F$ [* D# z0 Y q6 psuccess to get pots info; Y. [' ]" w3 E, J' o" ^
success to get ge info# D) c3 G: |1 ~" D [- ~9 {
the count of outerphy_desc is 3!/ H' u( a) a" Z
the outerphy_mode of outerphy_desc: 0!3 l. {/ n2 {! e0 R2 L; k; {/ R% k
phy_name:[]_[0]( v. u5 P. |# y8 @* {8 N! [
the outerphy_mode of outerphy_desc: 0!
0 g$ e# l, p6 B% lphy_name:[]_[1]
- r/ u+ ]! Z! b+ i: D4 athe outerphy_mode of outerphy_desc: 0!. c% i, U) X& J9 B
phy_name:[]_[2]
G( b- H7 s* u I- nsuccess to get outerphy desc info
" z( q% P, R- O5 E1 x, N- h7 e( avid unmatch! try next DTS8 ?. r6 G& w: }4 p4 L
success to get board info
" o5 H2 h: P, S: tsuccess to get cpu info, t7 _8 \; E$ N, v( k
success to get port info+ e: w! d+ a& N, S, k
zx_board soc:tdy0a_5@0: Property 'vid_list' cannot be read, ret: -22.
: A6 i. v0 J; D2 X7 o/ f1 Esuccess to get enet info
2 j. c/ }$ n' L6 o0 a, msuccess to get optical info$ l9 L5 ~4 Q* K+ I- C& s- w- G
zx_board soc:tdy0a_5@0: Property 'pots_info' cannot be read, ret: -22.% t8 Z! U' @' p
success to get pots info8 g+ f# ?% A* j y6 q0 a
success to get ge info( D( L3 X; @. p' \2 m+ F/ o
the count of outerphy_desc is 3!
; n& E4 H: W/ H& I) w: }the outerphy_mode of outerphy_desc: 0!
4 g# ^4 _4 u* }- J. {9 ^phy_name:[]_[0]' W' f& k1 O8 T3 m
the outerphy_mode of outerphy_desc: 0!
; w$ S2 l% }4 e& y! wphy_name:[phy_RTL8226]_[1]& S7 a- z6 s7 Z
the outerphy_mode of outerphy_desc: 0!+ _8 c; |) n0 W
phy_name:[]_[2]
7 s& _5 r( ]& Psuccess to get outerphy desc info
: m1 ^) h2 n+ [% _$ avid unmatch! try next DTS. R+ L" d" h' v% G
success to get board info# w- _$ n v; }# ?- K
success to get cpu info% M+ [( ^9 P2 h5 A' j
success to get port info9 g% }$ ] {$ c6 X
zx_board soc:tdy09_0@0: Property 'vid_list' cannot be read, ret: -22.7 k5 q! q2 A) x; _# B x
success to get enet info
% K# {5 s, ?5 j% v% F: `. rsuccess to get optical info
. v, V/ s m2 G& W, i/ V# izx_board soc:tdy09_0@0: Property 'pots_info' cannot be read, ret: -22.
! u O$ f3 n2 D Jsuccess to get pots info5 C' @$ w( Y* x+ p' p* F/ T( z
success to get ge info
3 A" ]: Q+ I, i4 _4 ^the count of outerphy_desc is 3!+ n; d7 K7 ?/ U5 Q
the outerphy_mode of outerphy_desc: 0!
, z0 I: I% x9 T U1 |- n5 dphy_name:[]_[0]
+ O! F; v1 f% M% ~$ U! r6 Uthe outerphy_mode of outerphy_desc: 0!% o: S+ `- V- f2 ~2 X& T
phy_name:[]_[1]
2 n5 ?+ c# s* Z3 b* W$ I, ethe outerphy_mode of outerphy_desc: 0!
4 F9 V' f- M- k* ephy_name:[]_[2]
4 T" ]4 E9 C5 ?% c# {) i8 Ysuccess to get outerphy desc info6 V$ i7 G" W' i. e7 p6 K
vid unmatch! try next DTS! ]2 S% m) |+ E. y! D
success to get board info m6 V/ Z8 V2 h; H; z; ]1 z+ H
success to get cpu info6 ^, Z _( n0 N& L6 r$ N
success to get port info
' L% R0 M! x) k: J3 t$ L# kzx_board soc:tdy09_1@0: Property 'vid_list' cannot be read, ret: -22.
0 o) E( H7 o4 a# bsuccess to get enet info6 D. G. Y0 Z4 I: R2 J" G8 [. W
success to get optical info
9 _6 O9 h% C9 c5 P z( y3 wzx_board soc:tdy09_1@0: Property 'pots_info' cannot be read, ret: -22.
+ l* R! f+ {. z! Fsuccess to get pots info
& b. K8 m n) w6 N. _3 Ssuccess to get ge info
9 ]; P! Z" T$ jthe count of outerphy_desc is 3!
- [' L4 Q: ]$ v, athe outerphy_mode of outerphy_desc: 0!. V7 y3 s. |) c! v+ I* ^& R
phy_name:[]_[0]* u3 d @2 e; W- L- u; T" u l$ F
the outerphy_mode of outerphy_desc: 0!5 K9 K; }* j" k+ c
phy_name:[]_[1]4 g6 c8 E7 c( u
the outerphy_mode of outerphy_desc: 0!
9 ~* ^" P( Y) F3 Fphy_name:[]_[2]
3 ] U$ X; J2 f8 j3 bsuccess to get outerphy desc info
# K' I% S- N/ g! Yvid unmatch! try next DTS6 Y+ b, r) s' o1 [
zx_board soc:tfy01_7@0: Property 'board_info' cannot be read, ret: -22." v3 C8 z* [0 T
zx_board soc:tfy01_7@0: failed to get board info
% i7 x+ P! \5 v- E+ w7 |cpufreq_zx: zx_cpufreq_driver_init
/ M7 [, }- y0 Pleds DTS probe by vid, successed
; |/ p. `. p5 o8 L# Qzx-leds-gpio soc:leds_2: 4 led has mux ctrl
^/ }1 _% p9 w4 w+ czx-leds-gpio soc:leds_2: alloc devid 1017118724 ]# Y3 M6 S1 }' L' J: k3 f
pon_plat_probe begin...
/ P( ~/ S0 D0 z3 w2 f: T+ P+ f[init_pon_plat_np_rsv_mem_cfg] temp_pon_plat_need_rsv_mem= 0x32450009 Y- Z9 `. r) M( s' ^) u% n
[init_pon_plat_np_rsv_mem_cfg] get g_red_cw_in_share_max error! default val is - 1) J2 m# k; E/ z' c, k/ H6 k) v
[pon_plat_get_rsv_mem_cfg] total_pon_plat_need_rsv_mem=0x3245000
% R2 M* l. C H[pon_gpio_init] Failed to get optical rxsd signal. y0 |7 r) W# B# E3 i9 @, F
[pon_gpio_init] Failed to get rtl8367s reset gpio signal
4 A( u0 A% |& @# l9 s9 ~( e5 C[tm_acl_max_item_init] g_tm_max_fast_num=0, g_tm_max_fast_num_v6=0, g_tm_max_fas t_num_l3=0* T2 g, D" s2 l# I5 A
[tm_acl_max_item_init] g_tm_max_opc_flow_num=0. {. M' B1 p8 y! f& n4 C: o
[zxic_e8_en_init] g_zxic_e8_en is set to 0
% n2 o; g/ ]9 Z& f* R( \[zxic_e8_en_init] g_zxic_e8_en is 0+ T( e* R/ H! ]' |
[up_mode_global_init] g_epon_open_high=1 use default!
2 p7 }. D! O0 ?% v: U[up_mode_global_init] g_epon_open_high=1% t) Z& ]" d8 a, r
[up_mode_global_init] bosa_and_switch_ponmode_info=0x5200040,g_switch_ponmode=0x 40,g_kernel_switch_en=0x0,g_multi_bosa_en=0x0,g_bosa_type=0x2,g_switch_time=60 q/ y6 L6 N* O7 J* X9 v
[zx_set_upmode_info] g_UpModeInfo=0x40 g_up_mode=0x40 g_is_auto_ponmode=0 g_lanu p_port=0 g_wlanup_port=0 g_wan_port=0
2 M7 m3 ?5 P$ ?% S; T4 {[switch_chip_type_init] switch_chip_type is set to 0 I( N* A! d+ f$ v! v( G F
[mdio_8226_id_get] mdio_8226_id is set to 1
& o& V% ]% L" S. t( p% ^[mdio_8367s_id_get] mdio_8367s_id is set to 03 \: X0 \/ [3 V; Y6 z
current_wlan_map is TYPE_133_8SSID.: l- p" T/ _. T) ^9 `; W
pon_plat_probe end...+ e% J: W$ q9 A/ ?/ M& ]
cacheinfo: Unable to detect cache hierarchy for CPU 0
. N' D0 T5 x5 t' _4 F1 ^5 Ybrd: module loaded
8 q! i) m4 c, U% q! P+ g* {( r! tloop: module loaded
$ q% l+ x* d! I" m# CSCSI Media Changer driver v0.25: r- c V/ i+ k, P9 P( i
spi-nand spi1.0: ID efaa2200, Winbond SPI NAND was found.
. C, e$ z& b; b0 k' v9 s) cspi-nand spi1.0: 256 MiB, block size: 128 KiB, page size: 2048, OOB size: 1282 C, I, d/ b; w
dynamic partitions parse
! o7 i I- z- h4 ^8 D6 \7 LFound 256MiB: 256MiB
" _1 G/ h0 [! e' h9 B) ?' T) l15 dynamic-partitions partitions found on MTD device spi1.0
. s0 J* M3 h2 v5 z$ VCreating 15 MTD partitions on "spi1.0":. q4 c& r2 ~/ o8 ^
0x000000000000-0x000010000000 : "whole". D; f( Y* X, L/ `" ~8 ~) J& S
random: crng init done
% n$ P! r7 r, I* ^) |7 X0x000000000000-0x000000200000 : "boot"
5 D0 \; O( v6 u1 p0x000004800000-0x000004c00000 : "parameter tags"
, d4 r I1 T; F3 Y7 n' L0x000000200000-0x000002200000 : "kernel0"
3 J( r- R/ ?& I$ F0x000005400000-0x000005800000 : "middleware"
+ C5 ~4 v8 l C/ y2 K* ]0x000004c00000-0x000005400000 : "usercfg"5 }/ \- _7 ]; @) p- a" U, N
0x000002200000-0x000004200000 : "kernel1"
' o* K$ p) Q2 L0x000004200000-0x000004800000 : "others"# ^8 B, o3 N. N6 }
0x000005800000-0x000005c00000 : "wlan"; T7 D( Y! z, R7 j! G# ~/ X
0x000005c00000-0x000005e00000 : "phoneapp0"7 Y; x" e7 x7 ]- ^& k4 U3 u; t
0x000006000000-0x000007e00000 : "osgi0"
% w& r- o% h& d6 F; V+ e% F0x000009c00000-0x00000fc00000 : "plugin_data"% A9 I4 A, H" D& v+ R
0x000007e00000-0x000009c00000 : "osgi1"
' r5 Q" H* D5 m+ j/ H7 k6 a; g0x000005e00000-0x000006000000 : "phoneapp1"
- y( u% c0 r+ Y* u$ M' h: D: f0x00000fc00000-0x000010000000 : "awifi"0 t' j+ Z& @" \, n) O) t* c' H
libphy: Fixed MDIO Bus: probed- N3 ]& o( `9 |0 o
tun: Universal TUN/TAP device driver, 1.6' G+ s& [8 }6 o3 z: D/ j- U, o
thunder_xcv, ver 1.0/ {' f/ `" o Q8 P: N& U
thunder_bgx, ver 1.0- g% o- } H; n/ c4 \, o" V4 a
nicpf, ver 1.0. m% o/ E" \# h. N
PPP MPPE Compression module registered
1 R7 n! b9 B0 V' I2 t% GNET: Registered protocol family 24. D+ d8 }/ z* L h4 \' J# V5 e
xhci-hcd 15008000.usb3: xHCI Host Controller z4 S7 h. I7 s" O4 Z" {
xhci-hcd 15008000.usb3: new USB bus registered, assigned bus number 18 M" n$ O( L) I1 q& L' E( I- z
xhci-hcd 15008000.usb3: irq 22, io mem 0x15008000
. _: h4 W3 }9 h( r6 G: Susb usb1: New USB device found, idVendor=1d6b, idProduct=0002, bcdDevice= 4.190 {% q, n" g- j0 V S
usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
0 k6 D% ]2 j/ a+ r& ^0 o# Fusb usb1: Product: xHCI Host Controller
F% `# l$ x9 b8 @" \) ousb usb1: Manufacturer: Linux 4.19.136+ xhci-hcd8 k7 m: U# w6 \. ]4 R6 \0 n: h8 T
usb usb1: SerialNumber: 15008000.usb3
1 Q4 [0 l" g4 p4 c9 jhub 1-0:1.0: USB hub found
' @5 P6 S! ^0 a" {% @+ Bhub 1-0:1.0: 1 port detected
; O; D8 y$ T& w$ `) W, {xhci-hcd 15008000.usb3: xHCI Host Controller% K/ p5 M# z" @+ V
xhci-hcd 15008000.usb3: new USB bus registered, assigned bus number 2" b* J) R5 J3 v8 I
xhci-hcd 15008000.usb3: Host supports USB 3.1 Enhanced SuperSpeed' ]0 O3 W1 d2 L: l: v' `
usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
* P3 J4 h& Y# Zusb usb2: New USB device found, idVendor=1d6b, idProduct=0003, bcdDevice= 4.19! m3 N0 Q, h9 U* ]. i7 ?; s
usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
2 z" x ]& b# }3 Nusb usb2: Product: xHCI Host Controller4 P5 I# H6 A$ U2 B+ D& s C" v
usb usb2: Manufacturer: Linux 4.19.136+ xhci-hcd* j' C) X# ~% z1 z7 p5 W- e* Y
usb usb2: SerialNumber: 15008000.usb3
, m& s0 ^0 C) f+ f! ahub 2-0:1.0: USB hub found
& G* Y3 I8 F0 ~3 ^& Whub 2-0:1.0: 1 port detected
% ^5 _. u7 V8 I( ~1 [% o9 Mxhci-hcd 15010000.usb3: xHCI Host Controller
% ^/ Q# p- q# lxhci-hcd 15010000.usb3: new USB bus registered, assigned bus number 38 H! c/ B1 ~: F7 D: y! Y$ A
xhci-hcd 15010000.usb3: irq 23, io mem 0x15010000
0 S0 D. V# P: |0 v, I* Nusb usb3: New USB device found, idVendor=1d6b, idProduct=0002, bcdDevice= 4.19
! _. i# y" c. F0 t; y6 f; }" }usb usb3: New USB device strings: Mfr=3, Product=2, SerialNumber=1
& ^% q) K7 V$ W" Z3 D) Xusb usb3: Product: xHCI Host Controller
* ]& W! q7 _( Q6 S0 R' ?usb usb3: Manufacturer: Linux 4.19.136+ xhci-hcd; R2 V4 w6 f9 N* O# L: I
usb usb3: SerialNumber: 15010000.usb3
" [6 |' f1 r9 x9 z* Shub 3-0:1.0: USB hub found
, [9 P+ Y' ~; v6 ehub 3-0:1.0: 1 port detected
! e8 s3 R7 k- l9 a* H, j7 ^0 ]; oxhci-hcd 15010000.usb3: xHCI Host Controller! B( }8 w7 A& O7 B" x6 g0 h
xhci-hcd 15010000.usb3: new USB bus registered, assigned bus number 4- [0 I+ @, A, s6 |! N1 Z
xhci-hcd 15010000.usb3: Host supports USB 3.1 Enhanced SuperSpeed; f/ A) W# V- W/ i7 U
usb usb4: We don't know the algorithms for LPM for this host, disabling LPM.
; q4 ^+ `/ o; J" R9 @" x J5 f; tusb usb4: New USB device found, idVendor=1d6b, idProduct=0003, bcdDevice= 4.192 z% q7 E# W2 @ W
usb usb4: New USB device strings: Mfr=3, Product=2, SerialNumber=1
% W0 M* }/ d# Z# D9 h+ u9 K3 Busb usb4: Product: xHCI Host Controller
) e Y; F0 _1 Xusb usb4: Manufacturer: Linux 4.19.136+ xhci-hcd
d2 v% }1 [$ \usb usb4: SerialNumber: 15010000.usb3
* z% C+ ?$ R# g) V! f3 ]hub 4-0:1.0: USB hub found5 _$ ]) E5 K5 t" ?% p- p! J; D! L) P
hub 4-0:1.0: 1 port detected
4 E+ X# s2 ]) r$ H. Zusbcore: registered new interface driver usb-storage( R# ^) K6 n" M1 D
usbcore: registered new interface driver usbserial_generic
, Q6 Z$ l8 C) N1 ]usbserial: USB Serial support registered for generic( N( I- v M$ W9 a( O, q; ~
usbcore: registered new interface driver cp210x
, v, N7 F% h* J0 q- D8 o* s' xusbserial: USB Serial support registered for cp210x3 \' v, _3 ^, m% L$ L8 s
usbcore: registered new interface driver pl2303( z" `* V7 ]' m0 U1 G
usbserial: USB Serial support registered for pl2303
" P" v3 _3 m, w4 g2 G1 x& T7 li2c /dev entries driver6 R1 D5 }- S4 w
u32 classifier
) [2 `, \4 c4 V: J; w: u& lxt_time: kernel timezone is -0000
; {3 c j. C5 Hzte--oss cpu usage module init% J2 t$ O. Z8 P& x6 x/ ^- \6 B
[kernel com_ioctl_dev]:comdev init enter, t% _, o! C: P
[kernel com_ioctl_dev]:comdev init sucess
, i! L' ]% q6 @11930:23:06 [Klogstdio][Info] [(886)LogStdioProcInit] LogStdioProcInit+ p1 Q$ w6 S; u7 i
# u5 [* B4 R& H2 F
LogUdpWatchProcInit4 W$ _3 m; o* y7 w! ^; ^4 p. k/ [
detail_process_init start( g l# ]* U j, a# b/ c+ ~
Initializing XFRM netlink socket
3 x0 J) b. ]9 m7 s$ ~( U# fNET: Registered protocol family 10) f% o: P4 L. i ~2 i+ s- I/ B
Segment Routing with IPv6: k0 ^; q* y( y' [2 \: `, J0 M
sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver
1 F# r: _/ c& ONET: Registered protocol family 17
; ]) J; ]- f# x6 l0 c7 GNET: Registered protocol family 155 Y; ?- i3 K! B: L& e7 u6 n( Q. @
Bridge firewalling registered, V9 _9 Z( V- V; o1 L# G) w% a
l2tp_core: L2TP core driver, V2.04 l+ D; R5 p, @" X" `8 ?
l2tp_ppp: PPPoL2TP kernel driver, V2.0
9 L0 {5 D* c' G# U2 g# t/ L8021q: 802.1Q VLAN Support v1.85 s9 d. ?( b4 G0 a/ H/ Y
Key type dns_resolver registered
1 T1 V! N/ e4 ?Loading compiled-in X.509 certificates
2 E+ i. d W# i5 u- R$ ]Loaded X.509 cert 'Build time autogenerated kernel key: bd6a5cb9563a2184cd950e56 662eabd273edf53e'
/ }3 t ~$ H+ E8 n1 uKey type encrypted registered; V1 l* k: C$ I, t0 k
zx_gpio_keys: zx gpio keys probe
6 u0 b. }8 D* `% O# D! wkeys DTS probe by vid, successed
7 O; Q1 m3 V7 T( Y* d& sinput: soc:keys as /devices/platform/soc/soc:keys/input/input0
" e9 ^9 R# T& z* i6 p- [$ gbr_uc_ffe_init registered melon @! v, n' h. m7 b( \
QOSBw module init9 |" Q0 P3 \ m1 A) |+ a5 O
6 [9 o* T0 ^8 i o
==========zxic_notifier_init success=================
: M' ^$ z+ _; H/ N1 X- M% Kmultivlan cache ini3 e, e4 L4 g. M
br_multivlan_init registered melon @
, {" ]3 E: m, g4 `br_vlantci_init registered melon @; A. t, b' K" E. ~* R0 o* V
Freeing unused kernel memory: 640K( _1 i( P) _ {+ n* p2 k, I+ W
Run /sbin/init as init process9 {, F2 C# O$ f8 z5 a
dmounting /dev/mtdblock2 to /tagparam, wait ...7 ~+ r$ S8 M, K+ z$ ?
jffs2: jffs2_scan_inode_node(): CRC failed on node at 0x003437c8: Read 0xfffffff f, calculated 0xf3a43fef
2 N: c! V' M# B: L! [jffs2: Empty flash at 0x0034383c ends at 0x00344000
( w* @3 @+ @ p# j ljffs2: jffs2_scan_inode_node(): CRC failed on node at 0x003447c8: Read 0xfffffff f, calculated 0x58b841188 s0 B# L/ l& D7 H
jffs2: Empty flash at 0x0034483c ends at 0x00345000' P( I8 w/ u0 C2 ]
jffs2: jffs2_scan_inode_node(): CRC failed on node at 0x003487c8: Read 0xfffffff f, calculated 0xbec1c4c6
8 o* h) r# ?: v1 a( L. _# fjffs2: Empty flash at 0x0034883c ends at 0x00349000
9 U. I, c Z" P8 n8 @! l$ `jffs2: Empty flash at 0x00349928 ends at 0x0034a000
1 a2 S5 g/ {8 p6 I2 d, zdjffs2: Empty flash at 0x003c0830 ends at 0x003c1000
: M; ?+ ^4 P+ ~8 }. ?, Q! d0 ejffs2: jffs2_scan_inode_node(): CRC failed on node at 0x003c17c8: Read 0xfffffff f, calculated 0x84bace03
& J- K- O* `( ]) p Mounting ramdisk at /var and /usr/cpkTmp u& K4 Q3 @; U# W/ N
mounting /dev/mtdblock4 middleware to /important_bak, wait ...
: _ Y' M% i* a1 p% Cjffs2: Empty flash at 0x00008948 ends at 0x00009000+ L0 t+ Z* {% A: H% a7 K$ c
jffs2: Empty flash at 0x0000a344 ends at 0x0000a800
3 T9 }1 G! [ Z+ Td Mounting /dev/mtdblock5 to /userconfig, A) e; s7 K9 v; c
jffs2: Empty flash at 0x0011b360 ends at 0x0011b800
! ~; _: h. _2 Ijffs2: Empty flash at 0x0011d240 ends at 0x0011d800; C! Z$ J' Q) O
jffs2: Empty flash at 0x007795f4 ends at 0x00779800
+ @7 C l" v i1 l Mount ok!; V+ O% V- A* `
d--------------- otarget is 0 --------------- G6 L# _7 S/ X
************************** mout mtdblock10 *********************6 U" J9 \4 n2 f/ |5 V
ddddjffs2: notice: (924) check_node_data: wrong data CRC in data node at 0x0011e fac: read 0x43c5ce84, calculated 0xbbb11b8d.
# w! q$ Q1 p3 G, d( jd
7 x; J4 d+ a( j' o% kjffs2: notice: (924) check_node_data: wrong data CRC in data node at 0x0011cd98: read 0xeb8464b5, calculated 0x4221e37b.7 D: u: n/ Y9 Y! o+ `. M: D* j
ddd
5 e8 @: n# H! _ a2 _# E3 vd
& F& t% Q6 q8 {4 Q$ P. z& `0 G' y11930:23:10 [U_sk_test][Warn] [mtduserapi.c(694)GetPrivateProfi] start pKeyName= factoryrestore, value=ffffff01!
9 j* g, P- D# j% y1 M- x2 c5 g: ^11930:23:10 [U_sk_test][Warn] [mtduserapi.c(807)GetPrivateProfi] end value=0!2 a6 F1 q/ a" M0 i9 Z7 D" X E) x
djffs2: Empty flash at 0x02b4ff34 ends at 0x02b50000( d: Z! z0 E3 J9 a: Z
jffs2: Empty flash at 0x02b52f18 ends at 0x02b53000
3 K: y# k6 ^$ E4 |8 ?dddjffs2: Empty flash at 0x04b28960 ends at 0x04b290009 a( s! |% x2 U$ w+ ^1 H" {9 E) N
dd Mount ok!
/ e. [; c1 l; I) y--------------- ptarget is 0 ---------------. m; B8 v, m- \) S
************************** mout mtdblock9 *********************
# I6 Q4 ?, `% O, q0 t" [+ h p3 r
sismac region_code 307
2 y0 V; z3 d9 x! Z$ \$ A( Asismac region code euqal 307
2 S; y: E5 Q+ U6 N0 E' [$ o' w11930:23:11 [U_sk_test][Warn] [mtduserapi.c(694)GetPrivateProfi] start pKeyName= skyregioncode, value=ffffff01!1 I5 ~/ u( S: o1 O3 @/ s4 u$ [
11930:23:11 [U_sk_test][Warn] [mtduserapi.c(807)GetPrivateProfi] end value=133!, J8 N& J+ b$ w0 l7 D* n y5 s
region code euqal 307+ s) J( M9 c$ @/ r" @* L/ [
11930:23:11 [U_sk_test][Warn] [mtduserapi.c(694)GetPrivateProfi] start pKeyName= factoryrestore, value=ffffff01!
+ o) \9 O& V; e# C! u6 j' C+ m' y11930:23:11 [U_sk_test][Warn] [mtduserapi.c(807)GetPrivateProfi] end value=0!
( c; r" o0 H3 @ Mounting /dev/mtdblock14 at /usr/local/awifi
. p; W2 a0 s& O& }mount: mounting /dev/mtdblock14 on /usr/local/awifi failed: No such file or dire ctory/ q- u7 \4 R% p; X/ f
idx_bak is not empty [307]9 m$ w5 j. |' i0 H1 E% N
USR_CFG_TYPE_FILE_BAK flag is ok [307]
! e' b* M1 E Y( a* O* M# tmounting /dev/mtdblock8 to /wlan, wait ...
/ g! i6 I3 s" Edjffs2: Empty flash at 0x00143014 ends at 0x001438008 ] B$ H) H" L7 S
Configuring MAC interfaces. q# l# T, g3 f- m. O: v
ls: /etc/sysconfig/network-scripts/ifcfg-mii*: No such file or directory I. m. b% A* ^) M" u
Bringing up interface lo9 ?. {' u% L( K }/ c# Y
*****************set bindv6only********************. Y3 c, f/ ^( c$ O( x
init_module: umod=0000000048a13e52, len=262712, uargs=000000007b29053c/ S5 N0 Z4 c8 f5 E0 q" K
bspdriver: loading out-of-tree module taints kernel.
: ]% q7 X9 X+ F! x- ]! k# {bspdriver: module verification failed: signature and/or required key missing - t ainting kernel
0 D8 w8 ]7 {) wqupengchao : symname is init_module2 k7 _* |8 V1 {+ Y4 K
zx_sec_init( j+ ? ]$ g& l1 a
storage_wakeup_proc_create success!/ g, H2 I2 M0 |( Y6 z
[bspdriver] uboot cmd_line: U-Boot 2.0.0 20241025183308 0x200000 0x0 0x83 0x83 UpModeInfo=0x00000040 regioncode=0x1333 [0 |& I0 X" l9 u
[bspdriver] bootversion: 2.0.0, bootbuildtime: 2024-10-25 18:33:087 o1 R6 P3 U q) F2 k, F
[bspdriver] kernel offset: 0x200000, active partion: 0
9 t% J5 F! r# j$ J% _+ I ?[bspdriver] no sec mode, read mtd.
/ Q5 l% `- `8 g" T$ Y& W6 ~s8HardVersion is V2.0: d0 y6 k2 t0 H2 q/ s
s32Description is ZXIC 133 UNI V2.0.0 286632 CM O( _; Q& Z: y: j5 z5 G3 V
s8VendorInfo is ZXIC
9 V" B( @4 j. s2 j" S5 |4 S% q" Cds8InnerVersion is CMDV1.0.011
" Q' n V8 {; fphoneapp is 2.0.0
0 Y+ e4 X) R) T( {3 e6 C8 V0 Kzx_vsinfo_init done
& c. Z3 R. G9 A8 t9 Ezx_vsinfo_probe ret is 0
4 L9 r6 I: C" D( J; a9 @. c[DEBUG]zxic_vid_init
, L# x3 Q6 B! Q6 K8 zstart i2c_1 setup., k+ e& K k7 z* N
can't get i2c adapter 1+ P! g1 D, Q/ X4 p
start i2c_0 setup.! |4 \& R2 |! G: m# d" d: M1 u1 U
init chip, g_up_mode=0x40
7 |8 F# k: L! p1 y- t3 O- Y- G' ?& j9 lGN28L95 read table 0xFF chipname-register success,chipname=0xFF.( l% W5 Q0 u, D. i* |5 f; V
UX3360 read table 0x86 register(0x80~0x85) success,chipname=.
/ ]; j% q6 X0 W: vUX3361 read table 0x87 register(0x80~0x85) success,chipname=UX33631.: ^2 _ K( y$ t% z
dbsp_mcu_eeprom_mode_select read table register success.
0 Q2 p! @# r1 r- f& p# Zjudge chip select mcu(0x*0) or eeprom(0x*1) mode ! count=0, judge_reg=0xFF. N) S1 F4 K. S/ ~1 S
bsp_chip_probe count=0, r_data=0x00.1 F. p4 t- O6 c2 b8 p3 L5 N: a
UX3361 found.
0 s5 ~/ k! L- h% x+ ubspdriver select mode is MCU.
5 A# ^8 Y3 ^2 _: r9 e[INFO]zxic_slic_adapter_init init success.- R H: G' [4 ]$ ^( F
sky: slic_spi_bus_id is [0], fpga_spi_bus_id is [0]" K7 A2 `" O; ]
bsp_spi_init can not :spi0.1- Y1 G% B: C7 U$ y( Y% d$ g
bsp_spi_init can not :spi0.2) J) z: Q9 K/ j( y. o# P; s9 e
bsp_spi_init can not :spi0.3( P, v! n* N* M- N
bsp_spi_init can not :spi1.1
( k' H; F' |1 S) n. @bsp_spi_init can not :spi1.2" b1 |# I/ ^* [5 f4 y( p2 Z; v6 I* d
bsp_spi_init can not :spi1.3
- p; t+ c! }/ W# J# T2 X=== verify slic info ===
, F4 d9 I6 `, u8 s1 atry mode: 15 f) K. `- J. u- T
slic mode pcm
5 I% H8 u( i6 k0x00000008,0x000000080 {# M* l/ j$ E1 V
zx_axi_tdm_setup
1 z5 @+ U- g& m: a: m! Yzx_axi_tdm_reset,TDM reset ok
6 {; d# _4 L) K5 I* i' i* ufound a port:0 cs:0 ch:0
) W5 _# x) O, U/ m; U4 kLantiq chip dxs found!" J: J* q1 ^% u
slic_rst_gpio 6 pull down
+ \3 X0 O. B& G/ {# E5 `: ^dslic_rst_gpio 6 pull down( @. Q2 @' p# u/ K8 H' E/ Q7 L+ a
kylin630 chip id error! 0x0
9 d* q. p" N$ Z* |slic_rst_gpio 6 pull down
- v" G' O7 A: I3 L) s+ V$ eSiliconlab chip id error! 0x0
! Z4 s; T! E7 L+ r, t" H5 c9 x. nslic_rst_gpio 6 pull down
5 f' `5 z0 j/ hrcn:0x0 pcn:0x0$ n4 V8 ]4 [( d$ @; e/ N( A/ P- T
can't found id.
* Z" t& O$ A1 H7 ?try mode: 2: @ e! l3 I; L t! q% {2 M8 D8 ^
slic mode isi; {5 |* I! w/ a) e
0x00000009,0x00000009
+ x% h. J8 E3 U8 g# }) M. Jzx_axi_tdm_setup
9 @8 _. L6 Y* c( j2 T% R* y7 tzx_axi_tdm_reset,TDM reset ok
8 s7 c: `' g: I) v( ^dfound a port:0 cs:0 ch:0/ ?3 A3 g. P; p+ y9 v! X
Lantiq chip dxs found!. J7 t8 I& e# h
slic_rst_gpio 6 pull down
2 F/ s* d E3 @9 }slic_rst_gpio 6 pull down* g& n' e* @5 Y7 W
kylin630 chip id error! 0x0
I8 x2 L& C7 H& G5 v0 j$ wslic_rst_gpio 6 pull down
( Y. |$ M. E! @; S$ x7 ASiliconlab chip id error! 0x0
! X2 `* m' v0 A. b8 `$ idslic_rst_gpio 6 pull down
8 m! {8 P. O9 B$ r: Lrcn:0x0 pcn:0x0& g, C8 Y, z& L4 O; y
can't found id.0 y; J8 m9 Y! K
try mode: 3
% f( E' M$ X6 W8 p- ^; |slic mode zsi
( Z# e# ]) n" }6 w0x00000009,0x00000009. I5 W+ h8 B2 q; Q! j8 Z
zx_axi_tdm_setup8 `# J8 x3 }% c, I: K7 \4 \
zx_axi_tdm_reset,TDM reset ok7 V( L; H' R( G- ]
found a port:0 cs:0 ch:0+ x4 F* ?$ ]! ]
Lantiq chip dxs found!- E; h2 f# M6 F1 F
slic_rst_gpio 6 pull down0 r2 O6 I0 E( P, ]' G6 W' G5 m
slic_rst_gpio 6 pull down* y; W- x+ i, x
dkylin630 chip id error! 0xff
1 |4 T5 n, _1 P8 ]slic_rst_gpio 6 pull down N) \4 N# a. `* U+ P
Siliconlab chip id error! 0xff: D' G, @% M# V- O- B6 ]# m
<3000000008>11930:23:12 [Klogfile][Error] [(1102)CheckLogConfFile] CheckLogConfF ile%CheckRestartCntConfFile( `$ m7 m' ^& ~ z1 _4 L4 x$ X
+ n N3 P7 |8 K9 w# c
slic_rst_gpio 6 pull down
3 h" g+ b2 m Orcn:0xff pcn:0xff
5 B8 G4 r; M6 b$ V3 ?6 Ncan't found id.
- ~/ O3 x9 H; V6 ^' j! nverify_slicinfo ERROR
$ ?3 }$ t7 {7 H1 Tsiliconlab_line_num: 0, zarlink_line_num: 0, kylin_line_num: 0, total_line_num: 0, T' V' @. m& X
kernel_frw
1 N( m' \8 m+ D- m2 @read: kernel_frw
2 p# w$ Q( X4 {! {2 L: i1 c! _9 c% qread: kernel_frw
5 o! P0 K- Q8 \; v# |. _xmac0 phy is phy_RTL8226+ X9 \1 u. d! p, c. X- K" V
init_module: umod=000000006c23bced, len=67864, uargs=000000007b29053c
$ l# q0 U# Z: }8 t; C1 idqupengchao : symname is init_module
; ^. w1 b- q3 Q; OStart insmod R8226b_init!
0 v5 P& K) V, [0 i# w I% v' Q2 Mr8226b_phy_probe: 576: rtl8226b Phy Driver Probe Done7 Q+ t- t, d- o9 c
result = 1' f6 Z# U: g( O1 m3 u; L
R8226b init success!
7 |4 c7 B" ^+ t+ ]% a zxmac1 phy is* K6 I8 M' ~9 J6 E7 j# y# c$ R* t
xmac1 no use
2 w7 f+ n& W* P1 m8 zinit_module: umod=000000007b00a603, len=5208864, uargs=000000007b29053c( a6 n3 t8 b* o9 Y+ f
np_133: magic '4.19.136 SMP mod_unload aarch64' should be '4.19.136+ SMP mod_unl oad aarch64'/ J+ J5 Y0 K \8 `. X, k0 b
dddqupengchao : symname is init_module
9 r* x: g/ n, d- R: w& uinit plat module
1 @) c2 d) Z$ \. pzx_timer0_probe: ==========zx_timer0_probe>g_timer0_irq=00 u7 {2 ^2 k. [. y5 P) G7 q
zx_timer0_irq_base_of_init: ==========1>g_timer0_irq=0
" _& R/ W6 Y4 N, {get timer0 irq succeed,g_timer0_irq:14! B- L" ` Q$ L Q m) {
zx_timer0_irq_base_of_init: ==========>g_timer0_irq=14,timer0_base=0xffffff8008c 8d0003 s I/ U/ {5 J7 m( k
get timer2 irq succeed,g_timer2_irq:15
: h* n! E: V1 t- n& V& ]pon init
- A6 B2 l3 A2 {' [sys_ctrl_base is 0xffffff8008c9d000
( Q2 E4 G1 \. W6 n otop_crm_base is 0xffffff80093d0000
& ^- B/ h& Q( fpin_mux_base is 0xffffff8008ca5000: g( x2 O9 I7 t7 C3 d: z" B
efuse_base is 0xffffff8008cad0004 b: f" R* U' D& r) `& K. u0 ~
pon_base is 0xffffff800d000000
6 V% I* t1 z7 ?* W3 Hg_pon_irq:29, ]# w( e3 X* Q+ d' ]
pps_base is 0xffffff800f000000
! V1 z& `' \' u. K" o: mnppt_base is 0xffffff8011000000& a: P" v* y7 Q" Q! J4 Z7 ]$ W; O
rgmii_base is 0xffffff8009900000
d4 ^; _) o2 ]# X) i' J. \pon_serdes_base is 0xffffff8009810000
% G8 t2 ?2 n/ w- h4 {pon_serdes_pll_base is 0xffffff8009830000- X. ]# m2 \% [7 d
uni_serdes_base is 0xffffff800a100000
% W) k) I, {* I: O' ^6 c* mpcu_base is 0xffffff8009850000
: Z8 @: N$ ~2 g& T: J1 [# B9 A* ] ngephy_apb_base is 0xffffff800e800000" [! e1 L \" u) O
idm-intr0 is 40
. S$ J- p. \- I& L6 R/ gidm-intr1 is 41
( _3 L0 F& [* m' Hidm-intr2 is 42$ ?8 r0 ]1 D% C7 H4 U
idm-intr3 is 437 C: u- p2 v5 o: n/ [
zx_pon_irq_base_of_init: idm_ddr_phy_start 0x80b23000, idm_ddr_size 0xee5000" S+ }. [& |) P# U% K
xmac0_pcs_base is 0xffffff8014000000- F) w% r% j; B
[zx_pon_irq_base_of_init] hol not enable" _' w; Y- s5 I- `$ `; L
enter gpon pon pll cfg
* K* X# `- t: U5 B9 Vmode_xgpon_nsyn_cfg. D2 }$ E" j6 V7 H
com_pll_lock_ready
' u x, s I, u& v5 v& Qrx los =0 rx data in8 |/ ?" ^$ q, R P& a6 D
cdr_lock_ready8 e# c6 w8 ^" ^" X( j
pon serdes init succeed
9 a7 b* t$ z1 F; m( F* Opon mode is xg
: u% ^( D' H# A q' gidm cci enable5 Z6 m# p a7 v* V+ e- z
CLK_MUX_3 is 0x06713277,CLK_EN_6 is 0x00001fd7., P! T9 m: Y |$ p \# B
val =0xffffffff, reg = 0x000000002c1966ab/ r2 n+ O# q# S. |6 E- n
reset val =0xffffffef
' x% h; N" b! P; m. o$ U' `% Y- gval =0xffffffef, reg = 0x000000002c1966ab
4 K' _/ n( i" \, A9 ~5 Sreset val =0x7fffffef
' u3 [: v1 z2 L! h5 C8 prestore val = 0xffffffef4 e/ A7 X6 H8 C
nppt init done ok. cnt = 0- H' B9 w( Z; e/ x2 C
val =0xffffffef, reg = 0x000000002c1966ab& x. M! b4 S" s. ?6 p# Y8 s6 f
restore val = 0xffffffff' z1 ^- T3 Z$ W" x3 K" M
pon int
4 V+ w+ R5 X) p% i6 {6 Q$ x# O. Mnppt int; j) O3 X! H7 D! G3 u* {1 M4 k1 ~
pon probe init ok
- i& \* u! ]# ?9 P& v" N: Snppt init start
) A3 Z+ z# i4 O) f, tinit gephy apb base
; O$ {+ c% p: D W2 l" R0 y3 c) ^% }val =0xffffffff, reg = 0x000000002c1966ab
$ o" x! M# Z# p9 X) t) X Y# [$ hreset val =0xfffffffe
, }! B* u. t- hrestore val = 0xffffffff6 A0 ?. g+ `* a/ f, G) k- ]
enter smac_init
! O3 R) |2 ?( G d. e0 Asmac_init: smac_pkt_filter = 0x80000001, mac = 0x0, k3 v7 [* d6 b8 V+ ~! \& ?
write smac an ctrl ,mac = 0x0
0 J! r: K$ t5 E% l3 l$ W3 p# B6 }read SOPC_CLR_OVER_READY_SMAC = 0x1, mac = 0x0( ^5 ~+ C' R3 K" Q0 S
write SOPC_SEND_EN_CFG_SMAC,mac = 0x0
- q3 z" A7 u& M0 Hsopc send enable ,mac = 0x0' l9 e* C- @$ ^4 k+ L8 h' B4 @
exit smac_init:mac=0x0
/ ~, a' a; C+ L$ Q* Y7 ~; ^% R& Cval =0xffffffff, reg = 0x000000002c1966ab
" B) w, E3 g! M( f3 Q/ wreset val =0xfffffffd
* @' _) f4 [7 H5 N( ^& S: prestore val = 0xffffffff
1 h$ ~( c. y2 ienter smac_init
/ r" ~- H& U# N- Ssmac_init: smac_pkt_filter = 0x80000001, mac = 0x1( I9 N0 F$ t0 n0 ~3 b! ^" H
write smac an ctrl ,mac = 0x11 B5 ~: {, r) O6 j i8 F
read SOPC_CLR_OVER_READY_SMAC = 0x1, mac = 0x1! p u2 \! H* [8 k+ R4 ?% x5 b" ? e
write SOPC_SEND_EN_CFG_SMAC,mac = 0x1, r+ |# i% L9 X' g" I
sopc send enable ,mac = 0x1. |% R* Z" [" r3 k. ]
exit smac_init:mac=0x1" @5 P4 s3 @. X3 c
val =0xffffffff, reg = 0x000000002c1966ab
0 y: n0 v( v$ Zreset val =0xfffffffb* ~. D8 B/ D+ `. T7 l$ @
restore val = 0xffffffff
! @/ I/ {+ @$ x# s- w1 Jenter smac_init; U; V! m) v7 b" @ N! h" | C
smac_init: smac_pkt_filter = 0x80000001, mac = 0x2) s* s' H0 \, ]; |8 j7 O
write smac an ctrl ,mac = 0x2
, A4 L. O3 y3 i+ \/ eread SOPC_CLR_OVER_READY_SMAC = 0x1, mac = 0x2
: E) [# c3 ]0 b% S5 S1 Uwrite SOPC_SEND_EN_CFG_SMAC,mac = 0x2& p$ R3 i" @6 v% R
sopc send enable ,mac = 0x2/ v% {; t( S. n4 e
exit smac_init:mac=0x2% Y% y, j6 h8 I! P
val =0xffffffff, reg = 0x000000002c1966ab
+ m+ b- Q1 k! Q5 j1 vreset val =0xfffffff7
, w4 |3 L! d; ~% i7 Z& _- ]restore val = 0xffffffff* \: |' b# i! f5 Q- G6 t+ K3 L. n
enter smac_init
7 i) x& A' q2 y* O# Fsmac_init: smac_pkt_filter = 0x80000001, mac = 0x3+ J' }& s$ D! t! ]0 n0 q* t% f! x
write smac an ctrl ,mac = 0x3
6 p, \$ f. x) d% U' yread SOPC_CLR_OVER_READY_SMAC = 0x1, mac = 0x31 {. m! B0 B6 S" K, v4 s
write SOPC_SEND_EN_CFG_SMAC,mac = 0x3% ]' n4 s) H7 K9 f+ p
sopc send enable ,mac = 0x3- K0 F1 x; @# N. T# Z: X5 N2 V
exit smac_init:mac=0x3
3 J5 T- o' K v8 i* U0 F2 @2 D[outerphy_phy_init]ERROR:param-><index:1><outerphy->outerphy_name:0x8af56d9>% |, K3 S& g1 {; m6 T4 b8 c
<outerphy_attr_array[1].outerphy_name:realtek fephy>% p, Z" T5 E, p; k
[outerphy_phy_init]ERROR:param-><index:2><outerphy->outerphy_name:0x8af56d9>* r$ C- g# W/ j
<outerphy_attr_array[2].outerphy_name:phy_88E1322>
4 q. {) C; f( J, C[outerphy_phy_init]ERROR:param-><index:3><outerphy->outerphy_name:0x8af56d9>. }. W9 Y% U; G7 i
<outerphy_attr_array[3].outerphy_name:phy_zx5201>; X3 y% o) ~0 T _) L" \
[outerphy_phy_init]ERROR:param-><index:4><outerphy->outerphy_name:0x8af56d9>
' @, e8 [7 c+ g, T <outerphy_attr_array[4].outerphy_name:phy_YT8821>
7 O0 S, A7 K) zddd' h. G+ H! M( d/ w7 T6 @/ X
dd[outerphy_phy_init]ERROR:param-><index:5><outerphy->outerphy_name:0x8af56d9>" F. q( {- s: H+ p8 K+ c0 ~
<outerphy_attr_array[5].outerphy_name:phy_RTL8226>
9 c9 F( L) V; p7 b) |$ _0 ~0 serdes option is 0
' Q9 j2 Z+ R* Y9 H3 z; L& {$ Fxmac0 is used8 W9 L# b/ s' C. R6 ^& N1 O
[outerphy_phy_init]ERROR: Can't get outerphy_desc! Plz check about it!9 o) v% T4 R3 j* @
[outerphy_phy_init]ERROR: Can't get outerphy_desc! Plz check about it!
( S9 i$ V7 Z. T7 |1 omac 0 link down
' T- [5 J6 e2 o/ e, _mac 1 link down! k" L9 H7 a4 J6 w1 j9 A
mac 2 link down
" l7 o% D9 k/ A3 e4 u& ]5 Umac 3 link down
8 ~5 O4 m- W" s. G2 |mac 4 link down
) d+ v" C; H |7 g8 F1 idm_ddr_base is 00000000b5d0cd85, phy addr is 0x80b23000
9 H, b' I; Z; C; g# q; Rddr size(0xee5000), idm used(0xee5000). \: b6 `7 ^; B1 r
irq[0] sg_idm_irq_mask_conf(0x71ffbfb)2 Y: w& r' l) @5 C5 t
1110001111111111011111110119 {7 v2 J' |9 ^2 E% A# Q' k
irq[1] sg_idm_irq_mask_conf(0x200000)" c- Z/ r' H2 d& i F
000001000000000000000000000
+ s4 v' x' n+ Cirq[2] sg_idm_irq_mask_conf(0x400000)
. w0 r) _9 s R( m1 G000010000000000000000000000; T4 v6 C( Q( |# d
irq[3] sg_idm_irq_mask_conf(0x800404)
6 u/ M! ~; r) E1 J" y. b- M000100000000000010000000100
9 k( M. @2 `; U1 y) M9 cidm net init ok( F t% m# A" o: P
nppt init end. ret = 0
) ~' v# o& B; S# `8 ]( d( f3 t5 Zinit np_reg module
/ d4 f* ]. ?+ U7 }0 jinit np start5 v4 p8 R I% j. W
creat ddr space for bmu.
* p4 C' F5 X9 Z4 j% B[zx_bmu_ddr_probe]:ddr space(start:0x81a08000, size:0x1f60000) for bmu( i3 H+ y8 o5 _/ D7 }) ~# e
pp_bppe_pool_init: BPPE_PA_BASE = 0x81a08000
" F4 }; ?* F$ e* v% H. wpp_bppe_pool_init: bppe_va_addr =0x00000000a5818b11, BPPE_PA_BASE = 0x81a080003 t+ V- u6 B0 z9 ~ ]% ?
tcont mode is 06 X$ _4 q5 P: _$ z% f7 w5 Z
ddr space(start:0x83968000, size:0x400000) for hash table; X5 K5 c$ g' i( Q
version: 0x0001.0x0108.0x31ba6a03
# `4 W& I7 y5 c) W7 B* atm acl init, ret = 0
, u; s" x1 X8 A' L# O. |[mul_ip_db_init] mul_ip_table_busy_lock!( x# w- A% Y. _& A& T' }* w1 U8 e
[outport_and_real_port_map_table_init]real_port: 15 real_queue_id:4199 T7 \6 m$ l5 }4 l
[outport_and_real_port_map_table_init]real_port: 15 real_queue_id:4194 w% O0 c- o- p+ i
[outport_and_real_port_map_table_init]real_port: 15 real_queue_id:419
0 L; Q3 d& m4 |5 o) u. ?( s# q5 U( s[outport_and_real_port_map_table_init]real_port: 15 real_queue_id:419
3 ^! r/ r' ^! U* C. E+ f2 I& J3 Y[outport_and_real_port_map_table_init]real_port: 15 real_queue_id:419
& r0 m* R2 s1 l; H8 }8 P7 q: g; l[outport_and_real_port_map_table_init]real_port: 15 real_queue_id:419
3 n; }! d# X+ U! o3 h% q[outport_and_real_port_map_table_init]real_port: 15 real_queue_id:419' p, y! e/ P( ?' a
[outport_and_real_port_map_table_init]real_port: 15 real_queue_id:419% e. w6 K) x% v+ p$ r' d
user table init success.4 p; w; g+ T" }* R m
Low power buf start phy addr:virtual addr:00000000ed718e3c K5 D' X, N9 m" v! \
create xemac_task_thread ok!
3 Z- Y& @# u/ y4 Xinit low power success
' l7 t/ v# t v( \' ainit np success
% ?# g$ W0 ?& ?4 z. SNP Module SYS FS Init ended successfully =- R; r1 {; |; @# ?- h
init np_reg module success" R) ^5 k H1 b9 C; G
[proc_pon_debug_dir_init] success!5 ?9 o; o6 M# x3 ]+ t7 R
[proc_pon_tm_debug_dir_init] success!
1 @5 L6 B$ F ^4 Mipsec init enter
; o3 T! ^% K9 z6 ]ipsec hardware driver will not init because the devicetree of ipsec is unavailab le.
1 ^, }0 j3 H5 a4 bpon_sta_filter_oam_omci_cfg_set enter' A% S+ f0 a& B2 l) O
pon_sta_filter_oam_omci_cfg_set end
% P( {# e0 s t# q% H' {, fcurrent chip is ZX279133) Y# ?! }9 Z' x6 D8 J" ^$ w; l, C
############################# 133
6 J; T# v: u& G, I# ^ Ainit_module: umod=000000006c23bced, len=8792, uargs=000000007b29053c
5 u( _9 b1 [1 N( kzx_ponreg_133: magic '4.19.136 SMP mod_unload aarch64' should be '4.19.136+ SMP mod_unload aarch64'
- V' n# b/ G' B& n6 Ojffs2: notice: (945) check_node_data: wrong data CRC in data node at 0x02b4eef0: read 0xee37cbcd, calculated 0xd068f8d.( h4 |( V9 n/ H+ s; d
qupengchao : symname is init_module
, H/ _6 @: Q7 K/ v$ bregister fpga driver success, major=222: z: t( x1 q* d ]6 t; M9 O
jffs2: notice: (945) check_node_data: wrong data CRC in data node at 0x02b54bf8: read 0x68c47d75, calculated 0x8cb69dd4.* x& p3 N: i. P$ q8 g% d0 ]0 _
init_module: umod=000000006c23bced, len=92416, uargs=000000007b29053c
4 p" ?! Y/ G' x/ A) T7 L% Z: rqupengchao : symname is init_module5 H$ Z+ h7 r% C4 i
init_module: umod=000000006c23bced, len=5736, uargs=000000007b29053c
- ?& D8 a: l8 f9 V' bqupengchao : symname is init_module
7 U6 L. k* |% ^1 J( [region_code_init region_code:307, ret:0# ^, w2 j c+ X1 J+ l; X# s
init_module: umod=000000006c23bced, len=84992, uargs=000000007b29053c2 l* B6 c0 R' W# F! O: D
qupengchao : symname is init_module
' c( w: r& P1 f) E! Z% D! Squpengchao : pon0 create success/ u0 I$ m* O" a% c9 l
11930:23:16 [U_busybox][Warn] [ifconfig.c(999)ifconfig] SIOCGIFFLAGS
9 {' O# A/ C; @3 p" B2 U* M" Q( y) ?init_module: umod=000000006c23bced, len=42384, uargs=000000007b29053c/ {* E$ ]6 \0 P5 [
qupengchao : symname is init_module
- s2 }5 [% x4 G4 I& @$ J6 jiprt_data_init success!- K; A, h$ L9 o7 I% p
init_module: umod=0000000067964c36, len=169288, uargs=000000007b29053c
/ Y! M) ~, C# @3 v: Y, xqupengchao : symname is init_module# [8 r1 H* s$ b) Q7 e2 E+ i
init_module: umod=000000006c23bced, len=48552, uargs=000000007b29053c
7 V% U* p3 k9 _' i p& tdqupengchao : symname is init_module, x: q* r1 J/ L$ P6 q
ethdriver_init....
g3 v' ]4 r7 G3 gg_mii_dev_name[0] sw
- u2 [/ J$ m" Qg_mii_dev_name[1] pon
) p9 x5 I7 X- y: P5 d% F+ Qinit_module: umod=00000000669be306, len=284952, uargs=000000007b29053c
1 @* V" `2 ~' E3 {' B+ Yqupengchao : symname is init_module
. m2 S% z$ n/ m @$ jinit_module: umod=0000000098178684, len=853280, uargs=000000007b29053c8 L( ?% h+ r d2 q- K" `
qupengchao : symname is init_module
+ O0 ^" d6 p" F; F7 C5 jInit switch module4 n8 s q3 g; p* t: e8 L
d[se_eram_table_check_out_of_depth] cur_bit_offset(8192) is out of range+ z* }# Y" s1 B! r9 l4 h" y
[se_eram_table_get_by_sdt_info] para error
6 L# z- V) Y+ ? f9 e6 v0 r4 N[se_eram_table_check_out_of_depth] cur_bit_offset(8192) is out of range- |! o( ^+ A8 v2 e9 j" V6 F
[se_eram_table_set_by_sdt_info] para error
- t1 f' f( F% l5 c# V! k, i8 n[port_attr_def_route_mode_en_set] port(64) set table ▒▒#_attr_name▒▒(0) fail
& v2 U) R, ]" d# p[tm_port_route_mode_set] set fail0 X* y, n5 l; k" h& b2 A( P7 K
init port route mode fail
1 n/ r% E9 V/ |5 N$ ]- [. p0 h7 [sw_cap.SW_ETH_UNI[1] = 4.
- S; j* S) E7 ~+ q* o+ e0 ]sw_cap.SW_ETH_UNI[2] = 1.) ~% r' f' b8 K
sw_cap.SW_ETH_UNI[3] = 2.
. S0 U0 A! @) u0 Usw_cap.SW_ETH_UNI[4] = 3." j: I( g8 K) R% s' K
zy uni num:43 s, c" V# V1 D: {
zy switch all port count:74 h/ E- d& |2 D! C, ^
switch config 9132 GPON mode!' ?' n# m& p' b+ Z, {/ ^. }
[yqs]set cpu queue rate limit to 4000pps; E0 K/ a" y! n6 P; T1 Z
[SW][sw_init_switch] reg hff& L! N! v! u3 t3 W$ O' i
[SW][sw_init_switch] reg ipsec up hff
) D2 [$ T; V6 _* G: @3 ][woe_reg_register] enter woe_reg_register!
" L* E2 `, U9 [[proc_pon_switch_debug_dir_init] success!$ c1 I! G4 x6 M5 z
create stati1_turn_thread success.
\) v3 b- q; I8 ~9 d4 qInit switch module Success* [% a f, ` R$ x7 R0 P2 f, c- p
[zxic_api_sw_upmode_set]input:upModeInfo is 0x40,new_upmode is 0x40,new_lanup_po rt is 0 new_wlanup_port is 0
7 L! z1 u# r: h+ A& s$ _[zxic_api_sw_upmode_set] done
0 X! p& i) ~. [- l) y; T! einit_module: umod=0000000033815f7d, len=308856, uargs=000000007b29053c; {. m1 S8 f% W5 p. o6 s7 G" d7 T, H
zte_xgpon: magic '4.19.136 SMP mod_unload aarch64' should be '4.19.136+ SMP mod_ unload aarch64'1 L) e; i9 _/ A- ?/ d6 s/ r/ n
dqupengchao : symname is init_module
6 ~, K- ~ A- ~2 v# cinsmod gponsdk_dev; i$ T$ l! C$ x' b; T
XGMAC: VirAddr:0x0000000019906458
3 h& }: N3 D; v/ J/ vpon mode is xg
+ M( s: E! P, d4 e& b. Rinit_module: umod=000000006c23bced, len=66504, uargs=000000007b29053c
) \. _+ Y* S2 i6 d8 s( Qqupengchao : symname is init_module
3 J7 V0 y, k8 M8 z/ [/ zgpon_Init ok. i9 `$ h4 p F
No need to load RTL switch chip driver& T2 l7 H; H- p3 \0 M* f& e
init_module: umod=000000006c23bced, len=47496, uargs=000000007b29053c, @3 G/ `$ }- G# k* j+ h
qupengchao : symname is init_module
! z* Q/ C: P, j( C8 P* yGN28L95 read table 0xFF chipname-register success,chipname=0xFF.9 m9 [ R# g7 o$ l2 r; e5 Y9 y
UX3360 read table 0x86 register(0x80~0x85) success,chipname=.
* T: V( V, {" j# s- Z( R$ S0 xUX3361 read table 0x87 register(0x80~0x85) success,chipname=UX33631.
1 e- T/ E2 `) \bsp_mcu_eeprom_mode_select read table register success.2 R _. d4 z3 C; q
judge chip select mcu(0x*0) or eeprom(0x*1) mode ! count=0, judge_reg=0xFF.
0 D! _, ~9 A" X' h7 ]% [1 A: ibsp_chip_probe count=0, r_data=0x00.5 K$ L2 H3 r2 z* k C; r: H/ @
UX3361 found.
6 Y' \: s% f }+ Ibsp_UX3361_probe 0x51 success!5 z8 _' e/ G Q! y t1 n
Optical select UX3361 mode is MCU.
1 a" n6 H# n! Hvendor name = ZTE_XGPON1ASY" H& W7 q- h' O9 q0 R( m. p5 `+ H: t
3 |. @% n, ` H* f3 L* y2 w9 Q temp_PN = ▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒1 b! Y E5 {6 n4 C; w2 m7 y8 e
# z6 \2 {9 i0 \+ \1 G7 `
optical PN(0x60) = ▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒% d0 d, b6 w6 ^* I( Z7 G
optical PN(0x28) = GN28L95
" f* I, D6 W. B) Tdinit_module: umod=000000006c23bced, len=34880, uargs=000000007b29053c
8 l& O1 B- G# [5 Kqupengchao : symname is init_module$ x0 V% \6 f# p X4 e
udpwatchd inited!/ l# E. Q. x8 Z( ]) G- @) `+ O+ h
kudp inited!& u1 y7 e5 C( p$ V8 c
init_module: umod=00000000e819560c, len=332416, uargs=000000007b29053c) m3 N1 T/ c& }1 a. S4 I
dsp_dev: magic '4.19.136 SMP preempt mod_unload ARMv7 p2v8 ' should be '4.19.136 + SMP mod_unload aarch64'
0 D$ M: i1 ]+ h/ q# D5 J2 L2 t5 _, `( Kvoip_codec: module PLT section(s) missing8 M6 G7 }- Y0 A; E' b! |
qupengchao : symname is init_module
6 J- ^7 t! F7 R. s& xInit codec v2.5(2019-09-18)!; W/ c5 k W" f
init_module: umod=00000000ed2969d6, len=161840, uargs=000000007b29053c
: G4 O- N. t! o/ gqupengchao : symname is init_module
6 ]2 r% b2 g6 X, g5 eP_2833: Setup 0
. a! g6 _$ H/ i8 V5 u4 nDSP device setup OK!' l# a% \3 v; p
dsp binding cpu:1 \6 N# e5 D O7 |, s; n* _* X
dsp softirq" |+ E' ~# E) n2 N9 G. o2 h
init_module: umod=000000006c23bced, len=24536, uargs=000000007b29053c! b- T/ v4 `1 |5 J( Y$ g
qupengchao : symname is init_module
" f2 S5 y/ V+ _: |. p- ^! oG_XGSPON_MODE is 0(XGPON)
& T, y% e: D ^% l( ]; Ainit_module: umod=000000006c23bced, len=27960, uargs=000000007b29053c
, d0 M5 s0 U& j d) D, K5 uqupengchao : symname is init_module" @6 R7 z. k8 N5 r3 @
dGN28L95 read table 0xFF chipname-register success,chipname=0xFF.% j" o2 P9 q4 x* K: c2 f
UX3360 read table 0x86 register(0x80~0x85) success,chipname=.
G" `4 U2 p/ r2 F, h+ @3 LUX3361 read table 0x87 register(0x80~0x85) success,chipname=UX33631.' }, y2 W) z! @, r* w+ m8 a
bob chip select is UX3361.1 F; F2 N h9 ~
bsp_mcu_eeprom_mode_select read table register success.
$ I# ]& y" Z( Fjudge chip select mcu(0x*0) or eeprom(0x*1) mode ! count=0, judge_reg=0xFF.) e& O4 K+ I/ q4 U- h
dbsp_chip_probe count=0, r_data=0x00.4 Q& x# r$ B7 R: Z
UX3361 found.( t9 s2 Y: u+ m u; H6 u8 k8 m0 o; S, z
bob select UX3361 mode is MCU.6 N" x' v% x1 f5 h
Kmodule GN28L95.ko insmod successfully !# ~# F3 n# a: K/ Z. Y
bobtest create /userconfig/GN28L95_datas_backup/BOB_CHIP_SELECT
3 y. ]& i! R( T f( P" }Bob chip_type: UX33613 i- }+ v' x/ _* d7 g% e$ G
bobtest GET_BOB_CHIP_SELECT OK
) ~. B1 Q* W) k" i. ] bobtest create /tmp/UX3361_MCU_MODE
9 y+ }7 {3 i, d7 R% TBob chip_type: UX3361/ |- i! D3 Q6 M a( c3 t+ x5 G
bobtest GET_UX3361_MCU_MODE OK
; V* I8 d1 }( B4 S& }6 VWLAN_TMP_MD5SUM_VALUE=717e1cd37329309ec465387e99e04245
* {$ v1 H* @; [3 rUSERCONFIG_TMP_MD5SUM_VALUE=717e1cd37329309ec465387e99e04245
, W, g& M9 [8 m+ pdWLAN_NOW_MD5SUM_VALUE=717e1cd37329309ec465387e99e04245- U; R9 e' Y' I/ _) J
USERCONFIG_NOW_MD5SUM_VALUE=717e1cd37329309ec465387e99e042456 i5 y& F! w4 y h
WLAN_TMP_MD5SUM_VALUE == USERCONFIG_TMP_MD5SUM_VALUE; f# c3 ^6 j r, k) T9 S8 ?
WLAN_NOW_MD5SUM_VALUE == USERCONFIG_NOW_MD5SUM_VALUE, everything is OK, leave!
! I! P2 C; u6 m$ I9 B) eBob chip_type: UX3361
/ ?; a( S+ ^( m6 w2 Hbobtest write_all_datas_to_UX3361,load data from flash to UX3361!
" m& C* s/ _% j4 _* E( p' F( Pbobtest table_select_UX3361 128 OK
2 }* M* e' r: M# W' f, w2 b0 ?bobtest reply_read_reg 162 183 0; j7 X; \6 m3 O! t6 I; a! }6 J5 s3 Y: K
dbobtest table_select_UX3361 128 OK4 Y" G. ?3 l) }# o0 g
bobtest write_data_to_UX3361 162 0 1232 m/ L! Q5 D- U$ z
dbobtest table_select_UX3361 129 OK" K' h% Z% F9 t" ?
bobtest write_data_to_UX3361 162 128 107
/ g8 Z0 g4 ~$ p/ B. M4 T! R5 Zdbobtest table_select_UX3361 130 OK
4 V5 Z- g4 `& e1 W' V2 fbobtest write_data_to_UX3361 162 128 107
5 X2 A) Z5 b" e9 c- j& b, x( o! Ubobtest table_select_UX3361 131 OK/ C, T$ d; I0 T c, G
bobtest write_data_to_UX3361 162 128 107" l! m+ C2 F2 b# e/ q. ~% ]
dbobtest table_select_UX3361 132 OK0 f& |% x1 k7 y+ g4 t- W2 c6 K, r6 m3 @
bobtest write_data_to_UX3361 162 128 128' M; m; x C3 R
dbobtest table_select_UX3361 133 OK/ `4 V* l* ? h! }: K- [
bobtest write_data_to_UX3361 162 128 128. d1 K4 y4 n, O3 m' ?$ |: Z; D
ddbobtest table_select_UX3361 134 OK) r9 D# @* v4 f4 k3 `' s! E
bobtest write_data_to_UX3361 162 128 43* v7 r9 Q! o1 y) D, m- |
bobtest table_select_UX3361 128 OK
7 I8 ^9 q* t, tbobtest write_data_to_UX3361 162 128 128
. d# _6 @" G$ Y {dbobtest table_select_UX3361 128 OK1 q# c2 e. _0 x# |$ |3 B
bobtest write_all_datas_to_UX3361 duration: 1.237986. r/ `% w5 N% Z0 Q* j! R! t
write_all_datas_to_UX3361 finish!!!+ M, g! q6 P; X+ x$ e" z
exit factory mode!: f6 z3 p: o% n1 I. j
init_module: umod=000000006c23bced, len=33528, uargs=000000007b29053c
$ v, j9 I* J0 Udqupengchao : symname is init_module! G, }$ i4 b ~5 P! [
success : download_init 13436 D, c8 b: }/ B, l% E6 p
init_module: umod=000000006c23bced, len=38288, uargs=000000007b29053c
! C& B7 ^+ d9 \6 q& U: a, m0 Lqupengchao : symname is init_module
* L$ d1 u ^2 f+ P* A3 ^0 s0 }+ e[kernel upload]:upload init enter
+ l9 X; z2 N: @( @[kernel upload]:upload init sucess$ X+ O Q& L3 z. g/ q2 W( |; u5 I# w
IPv6: ADDRCONF(NETDEV_UP): tunTX: link is not ready
( G- n. g4 I$ g) S7 `3 |IPv6: ADDRCONF(NETDEV_UP): tapTX: link is not ready
& a8 Y+ \7 g/ }7 h4 _, eMemory mapped at address 0xf7b2f000.8 T- z. I: P) Q( d# s1 u$ r
Value at address 0x19140240 (0xf7b2f240): 0x0; i2 a" K' g j
Written 0x1; readback 0x1
9 B; r) M2 m& o9 }+ e; ?sky:loop check_and_reinit phy
0 P9 _5 I; C7 |4 |& `" e- |# aregion code:307
4 Z$ l' w5 J, R" Qregion name:Beijing
) W" I- `% d; P4 d" n: h; idsky: lan:[4], pots[0], wifi[2]3 P2 X/ y# A! ^4 @
sky: could not found config xml [/etc/gponcfg/db_default_Beijing_novoip_cfg.xml]
2 C5 Z- n" ]* p! K2 Ssky: try [/etc/gponcfg/db_default_Beijing_cfg.xml]
/ c. k6 p x+ f! u4 Lsky: found config xml [/etc/gponcfg/db_default_Beijing_cfg.xml], G; O( E/ n* l; L$ P
USER_CFG is same as ETC_CFG, donot need copy e8 [' }8 b2 q: [4 m$ d1 J e. M
===================================================================
4 z" @9 }, X% d) N" }8 n- [ Database default setting is [current : 307]
% a3 x9 Z$ ?6 N4 q9 ?- @, Kchown: /webpages: No such file or directory0 J3 }9 w* J, }' c& w6 j
dFailed to set capabilities on file '/bin/ipsec/starter': No such file or direct ory7 A/ h- z# j3 t4 g l3 j
Failed to set capabilities on file '/bin/ipsec/charon': No such file or director y
7 _' f7 r" X/ _4 r: Vdmodel:
) q$ _7 }% L8 u4 c4 t; oSK-D847N0 }4 Z: Z" f5 Y+ ?4 [$ Y
dsoftversion:
: ~1 }- o9 ^' ], G9 V7 ? d$ sV2.0.0
; \' e3 X+ r8 b, w( xdhardversion:- {$ C3 K+ K7 Q* X: c
V2.0# ? X8 ^: C k D3 P( Z
dfull_version:
* g$ R0 f8 @7 A4 o2 `$ W1 d2 QSK-D847N_V2.0.0_SVN317966_VID002_DQ307
0 m4 i1 V/ e5 U9 B1 S*****************pc start********************
" Y) g! r+ T7 [6 P% @8 U*****************echo 5000 > /proc/sys/vm/min_free_kbytes********************
! O. U6 y; _7 N11930:23:20 [U_cspd][Warn] [zxicd_main.c(191)wifi_proc_contr] clib_scan_wlan_chi p cChipNum=2
# ], e* ~; ~. c. ]; ^. D" L! cOSS: start cspd[0x10000]7 J" }+ m, D" J( O3 K7 Y K
dchmod: /usr/local/osgi: Read-only file system
: y2 g3 X) M* x- c: k6 K/wlan/age.txt exist9 h9 p/ U) a3 D* R: T
$ i* i) m; f3 S
11930:23:21 [firewall][Error] [fwsc_mgr.c(752)reg_fwsfs_mgr_p] reg_fwsfs_mgr_pdt _cb melon9 Q: ?6 T$ l4 ~8 W
11930:23:21 [dss_mgr][Warn] [dss_lla.c(946)si_dss_lla_main] The Dss' lpMsg is nu ll. O4 h5 g% A# h5 @/ n
11930:23:21 [wlan_adapter][Error] [wlan_adapter_mt(362)Mtk_Init_7916] ====>Mtk_I nit_7916!' Z. S' d3 C: V3 i4 L7 H2 w
11930:23:21 [wlan_adapter][Error] [wlan_adapter_ma(57)wlan_type_init] wlan_chip[ 3].Init790a_7906!
# X2 d$ H! }4 j5 Y* |11930:23:21 [wlan_adapter][Alert] [wlan_adapter_mt(397)rlk_wlan_adapte] rlk_wlan _adapter_main, g_Wlan_Card_Max=2
# n2 ~* f. n1 e# C) Q i7 `11930:23:21 [osgi_proxy][Warn] [osgi_proxy_mgr.(496)OsgiProxyMain] OSGI_PROXY_PI D tUsbDevInfoListShmid sinit_module: umod=000000006c23bced, len=9768, uargs=0000 00007b29053c
' S& T4 p: }$ |" J I! [$ Lhmget init ok!
8 e0 d5 R/ P% r* ~& i0 Q* [$ i& xdbg: runing cmd[cat /proqupengchao : symname is init_module# }! u$ ]. h7 i5 M! Z2 @
c/capability/boardtype | sed -n 1p | awk -F ": " '{print $2}']
Y2 P) P9 [. M) F[si_lan_eth_filter_init 71] start./ f5 Z o7 F. K* G7 [/ F; m' z
11930:23:21 [schedule_reboot][Error] [schedule_reboot(365)schedule_reboot] mx_de bug schedule_reboot_init9 e, k; U) O. I( A. o/ N3 Y, G
dbg: runing cmd[cd /etc/Wireless/RT2860AP; find ./ -iname "MT7916_EEPROM*tdy09.b in" | sed -n 1p | awk -F '/' '{print $2}']7 E; |8 |; j& @6 ]/ |" R
[get_obj_string]obj_str=MT7916_EEPROM_tdy09.bin. G" Y0 G* z& Q1 V9 H8 k: n) x& O
11930:23:21 [DB][Error] [dbc_mgr_file_xm(3219)zxicDbXMLCreate] zxicDbXMLCreateTb lLoad tblname(EASYMESHCONFIG) ptViewParamFun is NULL error.
& m+ d$ R( T. Z! {1 s0 p9 e4 s11930:23:21 [DB][Error] [dbc_mgr_file_xm(3219)zxicDbXMLCreate] zxicDbXMLCreateTb lLoad tblname(UpgFirReboot) ptViewParamFun is NULL error.
5 w }$ z) }7 [; T* t6 ?3 k1 m. \* g% R9 g
11930:23:21 [DB][Error] [dbc_mgr_file_xm(3219)zxicDbXMLCreate] zxicDbXMLCreateTb lLoad tblname(LedTime) ptViewParamFun is NULL error.
3 o: Q! i0 D% d8 p11930:23:21 [wlan_adapter][Warn] [wlan_adapter_mt(6387)checkAndSetEepr] both /wl an/MT7916_EEPROM.bin and /tagparam/MT7916_EEPROM_bak.bin exist# W( v b9 T4 F: R% N
11930:23:21 [wlan_adapter][Error] [wlan_adapter_mt(133)checkAndSetEepr] ENTER ch eckAndSetEepromFileMd5_7916(133)
% w- K" T: F4 r. H& z: v11930:23:21 [DB][Error] [dbc_view_dev_in(231)Get_Wifi_Type] Get_Wifi_Type:e_wifi _type=0x20% M$ ]1 `2 D& A( p6 ~
SKY_MODEL_NAME has setted, leave!0 l& K( Z4 z, c. M. a+ G& L
11930:23:21 [DB][Error] [dbc_view_board_(143)GetStrFromFile] pon not found., z- Q1 x7 ?2 b1 m9 C: x8 M3 i
11930:23:21 [DB][Error] [dbc_view_dev_in(351)dbGetPortCapabi] Get pon port faile d!
9 T0 w" J$ V7 l4 g' T' d11930:23:21 [DB][Error] [dbc_view_board_(143)GetStrFromFile] ups not found.' F0 j% ?( u5 S+ G5 q: N
11930:23:21 [DB][Error] [dbc_view_board_(633)dbDefBoardInfo] GetUpsDevNum failed !, u* Q4 X" T* p& w
11930:23:21 [DB][Warn] [dbc_view_telnet(71)is_region_0] sky:init telnetcfg, regi on is default [False]! J0 U2 Q; r) i( e
11930:23:22 [DB][Warn] [dbc_mgr_init_cf(413)sky_db_init_mob] MobileAppInfo.BooTy pe set to 1
% o. H% B( D8 r/ {: c* N2 b11930:23:22 [e8_vlanbind_mgr][Error] [e8_macbind_mgr.(80)macbind_init_op] macbin d init option60 msg queue success
1 {2 Z) W' V2 E ]! [+ R, z8 c* a: n; ^/ R! [/ `6 p. p% L& M2 O
11930:23:22 [firewall][Error] [fwlevel_mgr.c(760)reg_fwlevel_mgr] reg_fwlevel_mg r_pdt_cb melon
9 ^$ m- L) z' K" e v# n! M11930:23:23 [wlan_adapter][Warn] [wlan_adapter_mt(6592)md5_sum_cmp] ************ ENTER md5_sum_cmp(6592) **************, A. Q. ]3 f! K0 C4 w
11930:23:23 [wlan_adapter][Warn] [wlan_adapter_mt(6599)md5_sum_cmp] md5_sum_cmp [/tagparam/MT7916_EEPROM_MD5.txt] [/var/tmp/MT7916_EEPROM_MD5.txt]: w. t) v" X$ x8 H( h
11930:23:23 [wlan_adapter][Warn] [wlan_adapter_mt(6605)md5_sum_cmp] open /tagpar am/MT7916_EEPROM_MD5.txt fail!
3 d6 v4 R/ E( V" _* h' b* \11930:23:23 [wlan_adapter][Warn] [wlan_adapter_mt(6592)md5_sum_cmp] *<3000000005 >11930:23:23 [KIGMPSNP][Error] [br_multicast_se(2800)br_config_mc_pa] dev_get_by _name error !
9 u6 T s# d0 j% c" C, [; w) |***********ENTER md5_sum_cmp(6592) *ethdrv_dev_ioctl ,brdev_set.port_id 0 ,brde v_set.name eth0 ,brdev_set.flag 0
9 w/ M: L3 O+ g/ L% X( l. W4 k*************
4 z2 t4 v. O2 m& P' t! J- A1 [( c11930:23:23 [wlan_adapter][Warn] [wlan_adapter_mt(6599)md5_sum_cmp] md5_sum_cmp [/tagparam/MT7916_EEPROM_bak_MD5.txt] [/var/tmp/MT7916_EEPROM_bak_MD5.txt]
, p' \- r1 [% H% a V! k11930:23:23 [wlan_adapter][Warn] [wlan_adapter_mt(6605)md5_sum_cmp] open /tagpar am/MT7916_EEPROM_bak_MD5.txt fail!* u4 S1 _# h6 C$ C; \
11930:23:23 [wlan_adapter][Warn] [wlan_adapter_mt(139)checkAndSetEepr] md5_maste r_flag=-1, md5_backup_flag=-1
. g0 A- g# ]$ {& @: S11930:23:23 [wlan_adapter][Warn] [wlan_adapter_mt(174)checkAndSetEepr] /wlan/MT7 916_EEPROM.bin and /tagparam/MT7916_EEPROM_bak.bin md5 are not verify ok.+ q' S+ M$ M! @7 s' {$ W
11930:23:23 [OSS_cspd][Warn] [oss_sche.c(897)RunProcess] RunProcess process[wlan _adapter] Event[0x1100] dwUsedTicks[289]
+ L9 R; E/ Y5 Oget regioncode 330100005 N5 }1 C0 Y& b. n/ z: n
11930:23:23 [ct_userinfo_mgr][Warn] [e8_ctuserinfo_m(3184)si_get_province] now i n func si_get_province_map5 Y7 x! V1 n6 s! s
11930:23:23 [ct_userinfo_mgr][Warn] [e8_ctuserinfo_m(3214)si_get_province] Provi nce:BEJ
- [% k. \) y" R0 n11930:23:23 [dss_mgr][Warn] [dss_lla.c(946)si_dss_lla_main] The Dss' lpMsg is nu ll.
; p" P; t# t9 ~( d11930:23:23 [route_mgr][Error] [route_mgr.c(2255)si_db_init_defg] si_db_qry_defa ult_rt: no default RT/ G" S$ P' e( q9 U' l
11930:23:23 [route_mgr][Warn] [route6_mgr.c(238)si_db_v6_init_d] si_db_qry_defau lt_rt6: no default RT$ v+ h. c$ e% g/ b
[pm_upmode_info_get] UpMod close uart!$ {6 l7 X8 n( G0 h2 W* h
) ?- A, }8 F4 P$ d* f
9 T' B$ h, G" I |
粤公网安备44152102000001号 
发表于 2024-12-29 19:12:31