输入用户名密码的时候一闪而过，来不及输入，按Ctrl+c或者D都不能中断
6 r6 S" w$ R) ~0 f4 n: \# X! hSPI NAND D# y3 ?: X$ E
start read bootloader
4 M& j {* C- r3 R# ?3 ?non secure boot
+ ?" Q9 z$ ]& Q. P+ oJump! m) j* A( X: W p" [1 c4 e
8 x3 T" H0 l. x. X6 b9 a5 _8 venter bootloader...
: Y# A3 R& V: E; k2 S8 l8 _! Zpll init, cpu freq=1000 MHz
- r, S y5 x5 o/ ~$ V+ x: D$ p$ E& H1 W
crpm init ok
* C" @3 L0 E& p; l2 L8 y: t. eDDR3 16bit 1600 Mbps) u( ?- g; _8 i) H i+ ^ y
DDR3 size 0x20000000=512MiB3 t+ ~- y. k/ T3 u
6 @: F. @; E' s% f p' G( W& l
ddr init ok% i) S& R( k0 A" G# s4 P& {5 {0 ]
1 k) J2 x$ w+ V( h7 E9 \: T. X+ `
6 T. w8 C4 T, _" @0 ~' ^, }& o$ EU-Boot 2021.01-svn308776 (Oct 25 2024 - 18:28:46 +0800)# T5 ?1 D) F5 ^1 D; g# q& Q
( X- S. V- `8 ^* UCPU : ZX279133@A53x2,1000MHZ
. p8 c/ a k GModel: ZTE 133
- ?% s' b8 H4 q6 W* [DRAM: 512 MiB" T+ _9 y- `. M* D9 f* ^- b0 R
Relocation Offset is: 17f3c000, fdt_blob: 0x9f6efd40
( `8 j5 o& Q+ F" {" _, mclk_register: failed to get sd_wclk_mux device (parent of sd_wclk_div), idx = 0
/ _/ i; ~- C( n7 ~$ V: ^' [clk_register: failed to get nand_xclk device (parent of nand_wclk), idx = 1- k6 h. K$ C* p; y; A; }
clk_register: failed to get clk1376m_div device (parent of pon_core_clk_mux), id x = 2
! u' h+ h8 y ~$ Eclk_register: failed to get clk40m device (parent of pcie_25m_mux), idx = 3% u9 E% l/ h: k3 B0 z
clk_register: failed to get pon_tm_aclk device (parent of tzc400_pon_aclk), idx = 4
6 _" H$ U) ^& ^% b7 O/ zvid is [2]" Q3 r7 Z3 [ l3 r- r: k
leds DTS probe by vid, successed( {& d Q5 }& p C1 D7 v
Disable watchdog.. Z/ i8 L1 ? T" }: H
el=32 M) m: ]' H; ?+ ?+ X* l+ L) \9 m& ]# P
NAND: zs->cs_regmap 0000000000000000
5 g( q- u& O8 V7 szx_sfc_probe: enter
: a c$ W& Z5 Hzx_sfc_probe: done
" j' U- D' J! z! g; i2 ]* u2 Aspi_nand spi-flash@0: READ ID data: ef-aa-22, Winbond SPI NAND was found.7 v, ]3 c5 b0 y9 B' R
spi_nand spi-flash@0: 256 MiB, block size: 128 KiB, page size: 2048, OOB size: 1 28
, n7 c1 Y! R# W% [( M9 Ospinand name:spi-nand0: F) s, ?& S: v1 ]0 \6 n1 f3 K
Creating 15 MTD partitions on "spi-nand0":* h" j7 g+ d$ i
0 MiB% T! b0 D, U( ~- y/ J
Loading Environment from NAND... OK3 |% r2 v, l$ l9 J5 B
In: serial
4 @5 `+ _$ G8 ?: X7 WOut: serial) m# N8 b# Y' G6 D- h) n# ~% }* N2 W
Err: serial
$ [$ T# p1 O7 o% f4 Q0 Cclk_pll env is not setted, core clk won't change& @: u. ? b* _) ] P
read partition others
6 ^- p4 k- A3 I5 ?6 p1 dSize not on a page boundary (0x800), rounding to 0x8006 a. {- {0 J% v, r( o
Reading 2048 byte(s) (1 page(s)) at offset 0x00580000) w6 {5 `) u! b+ n
[ERROR] SOFT VID(0x13300002) set failed, please set it again!' d# @3 w7 f' N1 D8 I: d
vid is [2]# h9 b R$ Q; z+ |/ z1 K
enter outerphy info init!
: X' B2 ?$ v- e9 N; _get board_info_id by fdt,the phy_id is 0x2
U& V$ ~# J9 c, a7 A$ nNet: rx data disable
- r5 L: [8 g9 s0 O3 `+ U5 qThe initial value of mdio_8226_id is 1.
' K$ {9 i- M# M* ?innerGeLedPolarSet 1
( e' x' z; Y& U6 q0 m7 [& binnerGeLedPolarSet 1
& R! Y8 ~4 x6 A( X! UinnerGeLedPolarSet 1) X' g, G& V' X+ u# X; Y
innerGeLedPolarSet 1' g v4 c( w3 S; G E% _
mdio_miiphy_initialize ok
8 {! |$ ]9 u0 b6 f0 v; }) Z2 Nenter gpon pon pll cfg$ d1 i! \3 X/ n/ F$ ^0 G' \1 k9 T
mode_xgpon_nsyn_cfg_133
4 [' x) O3 y; |( L8 I* ]* R9 Mcom_pll_lock_ready
_1 r P9 b1 p+ I, l$ Y. L4 u" Z; Prx los =0 rx data in
8 L; F! K, U5 L/ scdr_lock_ready
+ L. y: z& d$ k$ `; fpon serdes init succeed0 |0 _1 f: T0 J" ?& h* F
[get_dts_bosa_and_switch_ponmode_info] bosa_and_switch_ponmode_info=0x5200040.! {: m; l! ^; ~: Z* L7 W; |
[zx_pon_mode_init] switch_ponmode=0x40,multi_bosa_en=0x0,bosa_type=0x2. ^; f+ F* O! `- H, `2 E& a! F
read partition others
: W0 F& v+ d8 J* q* T3 yReading 4096 byte(s) (2 page(s)) at offset 0x00000000$ Q7 I- z& e* v$ P4 @- C8 }: ^
[zx_get_private_profile_uint] pKeyName=skyregioncode value=307 tmp=0x00000133
6 f$ Z4 ^- C1 X" g8 i[zx_pon_mode_init]regioncode = 307
( @* }) q/ V; q$ m5 Kread partition others
. M: |7 T) _# @0 eReading 4096 byte(s) (2 page(s)) at offset 0x00000000
1 ?9 ~4 X) S Y% A6 k7 h5 L[zx_get_private_profile_uint] pKeyName=factoryrestore value=0 tmp=0x00000000
- U! e$ }. P, g5 f2 I4 ^6 H3 G( Y1 ?read partition others
D% W! ?3 |3 n5 |5 q# SReading 4096 byte(s) (2 page(s)) at offset 0x00000000* e0 m4 f: v: C' P& ]9 x0 g
[zx_get_private_profile_uint] pKeyName=UpModeInfo value=64 tmp=0x00000040 n% o' z8 z6 k9 } I
[up_mode_get] UpModeInfo=0x40 ponmode_auto_en=0 upmode=0x40 lan_up_port=0 wlan_u p_port=0; P( i+ h8 `' L+ Y f0 ]
[up_mode_check_verify] upmode=0x40 ponmode_auto_en=0 lan_up_port=0 wlan_up_port= 0
4 ~% D- J% g. W' w! T, F6 kread partition others1 u) d0 {( O" C' t) `
Reading 4096 byte(s) (2 page(s)) at offset 0x00000000
+ H2 U6 H) Y9 \/ n& }; V' U1 ~[zx_get_private_profile_uint] pKeyName=UpModeInfo value=64 tmp=0x000000400 G% p( f; m: ]1 Z% R
[modify_bootargs_UpModeInfo] UpModeInfo_str=UpModeInfo=0x00000040, y7 Z8 U! R# D
eth0
, Y8 ?# q+ Q4 [Hit any key to stop autoboot: 0
( S& N" F" | x# C8 q+ Rread partition others1 o9 h) i) ? [! r) O* Q/ T
Reading 4096 byte(s) (2 page(s)) at offset 0x00000000
7 ]6 k* i. p( z1 w g) Mdo_mcupg function enter..& M6 }7 C+ w3 v* l+ [
val =0xffffffff, reg = 0x192c0004
) U) c- L5 }3 T' c m+ m9 u& {8 Preset val =0xfffffffe
8 X2 Y; \9 o( N- r5 R% Arestore val = 0xffffffff
% m: C, Q/ A% `. Z; bread SOPC_CLR_OVER_READY_SMAC = 0x1, mac = 0x0! c2 U7 h( ^0 ~
write SOPC_SEND_EN_CFG_SMAC,mac = 0x03 W0 a7 \+ I( u8 O5 W& Z
val =0xffffffff, reg = 0x192c0004
2 ?8 V {' \9 K- j8 {+ jreset val =0xfffffffd
l- A: C7 s/ C/ u- w3 X2 I% Nrestore val = 0xffffffff% U7 L( q$ M. z5 R) C
read SOPC_CLR_OVER_READY_SMAC = 0x1, mac = 0x1
" T% \0 W3 B! \3 xwrite SOPC_SEND_EN_CFG_SMAC,mac = 0x1. l. O4 t6 G1 Y$ I
val =0xffffffff, reg = 0x192c0004
& d8 J# a6 M: ]. Ereset val =0xfffffffb
; f9 r: S( z# S: a# t: erestore val = 0xffffffff, b9 w$ P, W0 e- w5 ` d
read SOPC_CLR_OVER_READY_SMAC = 0x1, mac = 0x2
! @# y0 U# l! |. Z* h }0 lwrite SOPC_SEND_EN_CFG_SMAC,mac = 0x2% _2 I' \: @' U
val =0xffffffff, reg = 0x192c0004
( r' E0 }1 v4 R. `% _" q# breset val =0xfffffff7
- b6 t3 e; ~8 G0 Orestore val = 0xffffffff. i; M0 m: e: t8 j8 X' z/ K2 J
read SOPC_CLR_OVER_READY_SMAC = 0x1, mac = 0x3
3 m5 k9 H3 d& ?8 Q1 lwrite SOPC_SEND_EN_CFG_SMAC,mac = 0x3
: X2 W3 s9 C# ~6 O- _! s& Jenter outerphy info init!1 d7 e( r" M1 P/ u3 {
get board_info_id by fdt,the phy_id is 0x2" }) x" C& u7 k/ p4 [! V7 F
[outerphy_phy_init]Warning: No outerphy on this port<6>
, A2 o* [% Y' F" m* Genter outerphy info init!( `/ k* _- U! j2 E6 O' u
get board_info_id by fdt,the phy_id is 0x2: {$ M |+ Y) ~- A
--->phy identifier is [0xc849]7 m" b6 l2 R# B, g+ |3 _( u
5 serdes option is 03 Z& B3 V* |$ x
xmac0 is used.4 A% w2 g0 F# j. |4 P; h }: m
enter outerphy info init!
4 j+ C; b% O2 C/ c% I- oget board_info_id by fdt,the phy_id is 0x28 K1 X; T" r# y- U' \
can't find this index!
8 o I8 l. k' l4 x[outerphy_phy_init]Warning: No outerphy on this port<5>
( U/ z" [' `, j* `3 Y: y7 Ridm_ddr_base is 0x00000000b00000009 `) @( M: n! n4 h0 J, U- d# a
enter gpon pon pll cfg5 H- R; m7 G3 p3 o# y, k
mode_xgpon_nsyn_cfg_133
c* R9 c0 i# Z) kcom_pll_lock_ready5 k( }- E/ N6 ~! Q% |' W; W
rx los =0 rx data in) o# m$ I, J" q
cdr_lock_ready
, ?9 {, N% S% A; W5 i, {pon serdes init succeed
( d( P& C. l& U; [+ K qnp init ok& t2 q5 N1 R: Q
mac 0 link down3 y# C4 y4 F5 o
mac 1 link down
) b h: J& j9 M5 o) L: Umac 2 link down" U* ^! x$ c6 o! _
mac 3 link down
j" s0 b9 h# ~1 ?4 Lmac 4 link down
% N5 `; K8 I( p4 n+ n* Zmulti upgrade check timeout.
* j$ I7 V d! ]8 w& Q9 W% O! ~Receive multicast packet failed (>.<)8 h8 y8 V8 O! K+ z" Y+ D, D/ Q
read partition others
) P6 {# |) Z. y5 u0 JReading 4096 byte(s) (2 page(s)) at offset 0x00000000
O0 r; N' A8 JBootImageNum=0x00000000,01 c3 j+ n: d0 l1 n( O8 e% n
name is kernel0,offset is 0x200000# h \) |4 C! J$ w+ _3 y7 D
read partition kernel02 j' s+ }! T1 d9 R! T& j5 P
Size not on a page boundary (0x800), rounding to 0x14ae000
O, L7 x" `1 X7 MReading 21684224 byte(s) (10588 page(s)) at offset 0x000000009 N/ c) R2 M7 b! G; a1 X% V
find kernel0 flash entry is 0x200000# w+ P3 h6 S$ v+ d' q
read partition boot* u% f9 I0 z5 x$ v/ H2 Z6 j
Reading 1572864 byte(s) (768 page(s)) at offset 0x00000000
, q; V8 t' u! l0 Q& H9 ?set bootargs,str is console=ttyAMA0,115200n8 rdinit=/sbin/init U-Boot 2.0.0 2024 1025183308 0x200000 0x0 0x83 0x83 UpModeInfo=0x00000040
; D6 H$ _2 v, w, z# Sset bootargs,str is console=ttyAMA0,115200n8 rdinit=/sbin/init U-Boot 2.0.0 2024 1025183308 0x200000 0x0 0x83 0x83 UpModeInfo=0x00000040 regioncode=0x133/ W- d3 N* @/ l' P- Z4 P
Saving Environment to NAND... Erasing NAND..." O ~# v: N B. d7 U, A2 k- |$ M
Erasing at 0x1c0000 -- 100% complete.
8 P( S7 o, ^. r$ wWriting to NAND... OK. E, X* @8 ]3 W) P8 D. h `8 ?
OK
) \4 N1 f R4 y' _9 F( N% T! aconfig string: #conf@1339 t% f' z' Z' ]9 [( h% m9 ~
## Loading kernel from FIT Image at 88000000 ...
% R5 j/ \0 a2 }1 ^+ E& K Using 'conf@133' configuration
9 F( e" ]8 a& L( D Trying 'kernel@133' kernel subimage
# N- M; T0 `( J- |1 h Description: Linux kernel for 133' P) n4 @' g: y( @
Type: Kernel Image
4 W8 L! u4 {- a- a) f( N Compression: gzip compressed! n8 y( ?% a' N4 m9 `8 ? _1 [& s
Data Start: 0x880000f49 c( L. e% v* P+ ^/ |( P- h, C
Data Size: 4815863 Bytes = 4.6 MiB( V: [, D7 L* a. s6 e5 l3 j m0 v
Architecture: AArch64# P5 {, D T: ~3 Z9 `, X1 P. r! z( a
OS: Linux) A O: `9 r& g! d' P% q
Load Address: 0x80080000
% _' `3 T6 k" B8 ` X0 j Entry Point: 0x800800003 v8 ~" W5 L* j
Verifying Hash Integrity ... OK
; E/ q. y9 V F0 G% v## Loading ramdisk from FIT Image at 88000000 ...
* f- A9 T# h8 X( w$ `! `8 W Using 'conf@133' configuration1 \2 T" o3 y& [! ^6 g' T
Trying 'initramfs@133' ramdisk subimage) c1 |4 G X" V7 _9 Z& K$ J
Description: initramfs for 133
/ T' c* O) |# x A4 E7 U. E Type: RAMDisk Image
* T% n9 R w. V9 i8 Z* @ Compression: lzma compressed
: Z7 v" v. P [4 r' R5 M$ e$ D Data Start: 0x884a3f24
' Y; w7 |7 ]/ I* |6 o& S+ W Data Size: 16815245 Bytes = 16 MiB* m4 q; u0 a6 Q: `! H+ e; {
Architecture: AArch64
0 p1 h3 Q$ F% Q3 `2 S OS: Linux; U t7 E9 f) b) ]/ _ x( {
Load Address: 0x00000000
$ o- v8 W5 ^1 G! |0 K8 c' Z Entry Point: 0x00000000
" @% |# @. A6 G7 t Verifying Hash Integrity ... OK: x' K9 Q7 U7 R& ~$ u7 w
WARNING: 'compression' nodes for ramdisks are deprecated, please fix your .its f ile!3 C4 z; j! d7 Y( n5 f
## Loading fdt from FIT Image at 88000000 ...
. E' X& a, v0 q# N. H! ^ Using 'conf@133' configuration: q, T! |1 ], ?) G* Z" _% y, a
Trying 'fdt@133' fdt subimage
/ j) n& H) q, Q1 E. s Description: Flattened Device Tree blob for 133
3 e; R! D, |: Z( w Type: Flat Device Tree3 a* z9 S. L8 t1 l+ B
Compression: uncompressed2 w/ V2 L6 b# p' H1 o1 o/ @- j
Data Start: 0x88497dc82 z2 q% Q' F% ?0 E- x
Data Size: 49307 Bytes = 48.2 KiB
1 R* }$ i0 v' X( [* U0 n Architecture: AArch64
: p6 J0 f1 V1 r$ w1 n+ Z* Q D% y Load Address: 0x82000000
7 U5 q) q0 |9 R* N Verifying Hash Integrity ... OK
% b5 n& e" I2 H4 M! T+ n: U0 t Loading fdt from 0x88497dc8 to 0x820000008 C7 l9 L# d) w$ x* ]" L1 d1 B
Booting using the fdt blob at 0x82000000( A0 A6 k: N* M
Uncompressing Kernel Image$ t I& L. V2 |
Loading Ramdisk to 9dff2000, end 9effb48d ... OK* H. z+ M. @7 l. e" Q/ R6 \! Q9 r; H
Loading Device Tree to 000000009f6de000, end 000000009f6ed09a ... OK
/ a: i. ? Y) {2 \7 A0 kft_board_setup8 Z& T; Q0 M. U$ }! {
ft_fixup_flash spi-nand07 P% w$ \3 d# O( p7 Y3 n, E6 F, P
ft_fixup_flash-spinand2 M& j$ [9 F8 ~( K1 h( H0 ^
, e/ H+ V+ b1 W* v, L( T- mStarting kernel ...- X+ _5 P$ N: U* w: |$ C
; {1 l+ f" n! g# ]2 ZCPU0: Set slave cpu addr = 0x00211A8C
/ @5 f7 ?" x: F1 U. OSLAVECPU: Cpu = 00000001 online successfully in psci!2 I* n! K& Q/ }7 P% D
init psci ok!!
U- o) t3 J; J1 ~. c( QCPU ON: Target cpu = 00000001 entry = 0x8072B1E0
6 u! z4 d) R# U; H# z4 n7 v6 cCPU1: Jump to linux kernel entry = 0x8072B1E0
) K5 @5 ~6 A, A9 J+ `* t" kBooting Linux on physical CPU 0x0000000000 [0x410fd034]. A$ R- \0 ~( x3 k
Linux version 4.19.136+ (chenmengxue@skyworth) (gcc version 5.3.1 20160412 (Buil droot 2017.05)) #4 SMP Fri Oct 25 18:33:08 CST 2024; u5 c! C7 \* W+ `6 l" t# ~
Machine model: ZTE 1332 o! M5 {) t" T/ W/ ~+ { s0 Y% _( T
zx_resv_mem: base 0x0000000080b23000 vbase 0xffffffc000b23000 size 0x3245000/ C. x- v1 D/ Y' v. G/ i! h ^8 m' p% p
OF: reserved mem: initialized node pon_rsvmem, compatible id zxic,resv-memory
5 S- {' q5 S# h" e# S( epsci: probing for conduit method from DT.
9 @4 {3 k( b. z/ Tpsci: PSCIv1.0 detected in firmware.3 r3 W# J$ k1 [7 V9 o1 y
psci: Using standard PSCI v0.2 function IDs& B. K% F( r" j! C: {; R
psci: Trusted OS migration not required
/ G* p7 D8 w! F2 H" ^psci: SMC Calling Convention v1.0
s( k2 U' h) C/ Z, B* d v" T/ frandom: get_random_bytes called from start_kernel+0xb0/0x414 with crng_init=0 p+ |: \- c2 v) U+ _5 |
percpu: Embedded 48 pages/cpu s157016 r8192 d31400 u196608
7 J( x+ @, s& R2 RDetected VIPT I-cache on CPU0/ M) g- u5 ?2 X8 P9 i2 q
CPU features: enabling workaround for ARM erratum 845719
. g8 v' s6 c+ ^$ O' zBuilt 1 zonelists, mobility grouping on. Total pages: 129024! ` c7 J& C8 a2 a
Kernel command line: console=ttyAMA0,115200n8 rdinit=/sbin/init U-Boot 2.0.0 202 41025183308 0x200000 0x0 0x83 0x83 UpModeInfo=0x00000040 regioncode=0x133
) c* v# s1 D0 j9 o4 J# A5 _zxic : zxic_cmdline_console : ttyAMA0
# x9 F( n) _% c4 v" t3 X0 [[init_up_mode_info] g_UpModeInfo=0x40
4 G1 \3 V# K2 O) ] d& O, k. L[init_regioncode] g_regioncode=3077 d1 u( ~& H4 G+ l
Dentry cache hash table entries: 65536 (order: 7, 524288 bytes)3 Y6 }9 O# z, F
Inode-cache hash table entries: 32768 (order: 6, 262144 bytes)
, h* z# [8 }- T4 m" |Memory: 403064K/524288K available (6846K kernel code, 506K rwdata, 2380K rodata, 640K init, 441K bss, 121224K reserved, 0K cma-reserved)
1 ?2 L# m; ^- p/ {SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1; i6 Z/ R) w* Z' T0 h) C
rcu: Hierarchical RCU implementation.2 r% ^( r. l) W9 t. y" \
rcu: RCU event tracing is enabled.* r& o0 o( {* T* e
rcu: RCU restricting CPUs from NR_CPUS=4 to nr_cpu_ids=2.
$ y V2 l- E& m$ s" n( h; F+ Crcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=2 s' c5 L ?% x8 w3 R
NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
# ~: X+ f9 L, VGICv3: Distributor has no Range Selector support7 U6 V/ a( W7 E9 T3 z
GICv3: no VLPI support, no direct LPI support- t- M& d3 U. W. Y/ e& W% \
GICv3: CPU0: found redistributor 0 region 0:0x0000000000540000
! r0 D' d( M3 E, Sclk_common: pll_2000m_clk:register pll
% \0 A5 s; [3 Iclk_common: func of_zx_clk_parse_pll nr rate is 11
' Q6 i1 O$ B& C6 aclk_common: pll_2000m_clk:no paticular pll-enable-register, use default cfg reg2 _2 m) p" S/ R- j8 L% P
clk_common: pll_lsp_2000m_clk:register pll' V" V2 ^6 W9 n1 ?
clk_common: pll_lsp_2000m_clk:failed to find property zx-clock,pll-en-bit# Q0 g% {3 ] L( {
clk_common: pll_1376m_clk:register pll
$ O7 s, s# o5 vclk_common: pll_1376m_clk:failed to find property zx-clock,pll-en-bit3 M# V( H& Q+ V4 x4 j
clk_common: pll_fpp_2500m_clk:register pll
" U4 g" ~( X: Cclk_common: pll_fpp_2500m_clk:failed to find property zx-clock,pll-en-bit+ T8 `; t% D4 K5 I% L4 o; D! Q
arch_timer: cp15 timer(s) running at 25.00MHz (virt).
5 a: k: R* A& v. Yclocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x5c40939b5, m ax_idle_ns: 440795202646 ns3 W- M& D l" G0 n \
sched_clock: 56 bits at 25MHz, resolution 40ns, wraps every 4398046511100ns. e( I ]; K, ?2 N% s( t; m9 k7 S
Console: colour dummy device 80x25/ s8 M: Y7 o: ^, A" Q. F3 @& ]
Calibrating delay loop (skipped), value calculated using timer frequency.. 50.00 BogoMIPS (lpj=250000), V; A# W2 b) ]4 N
pid_max: default: 32768 minimum: 301
% g8 _, A* f: O9 S ~Security Framework initialized
% I7 H' y4 Y( H; {4 w4 TMount-cache hash table entries: 1024 (order: 1, 8192 bytes)
' }1 T+ w# T/ z, V Y" qMountpoint-cache hash table entries: 1024 (order: 1, 8192 bytes)
5 {3 ~1 i1 Z) ]! j7 N4 Y/ wASID allocator initialised with 32768 entries- h8 Y- C. Q8 L ~# \, q
rcu: Hierarchical SRCU implementation.+ B* K8 y3 @2 V, ?+ K% g
common ,zxic_early_init* f" k3 [( }8 d8 ] T7 C
smp: Bringing up secondary CPUs ...( [' Y* N* K4 s6 V9 \$ l+ s4 ^+ f
Detected VIPT I-cache on CPU1
% r1 q: z% P) A u( p. SGICv3: CPU1: found redistributor 1 region 0:0x00000000005600000 a9 n7 f0 [& T8 h7 Z1 E. I! _
CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
7 ?, E' @ W7 _/ r9 F+ ismp: Brought up 1 node, 2 CPUs
0 I, H/ Z# C; ySMP: Total of 2 processors activated.& ? n3 M" _3 g: f
CPU features: detected: GIC system register CPU interface/ P! {5 V+ x/ ]1 L F
CPU features: detected: 32-bit EL0 Support
8 t$ u7 v; K1 |: Y gCPU: All CPU(s) started at EL19 z" i' A/ [6 `# S0 C d
alternatives: patching kernel code
2 b% _6 n6 }7 d3 O6 _# Y) H8 U5 Qdevtmpfs: initialized
/ \$ ^1 u8 @- G* xclocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 1911 2604462750000 ns
, t2 u- ]! X" x1 g8 ufutex hash table entries: 512 (order: 3, 32768 bytes)
) L9 \' z: o! A# Rpinctrl core: initialized pinctrl subsystem
3 B3 B' v1 h3 V @NET: Registered protocol family 16
( X$ U o/ r: m- k& j3 Ycpuidle: using governor ladder: L- |2 k5 F7 ~2 o5 R. f
hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
' w- O; p/ [2 J) u2 ^DMA: preallocated 256 KiB pool for atomic allocations
" ~/ E; u4 ^- }Serial: AMBA PL011 UART driver3 g2 ~! O+ J* {9 q7 u9 ~4 d4 u
zx reset init
' \& }& B+ p! f$ ?3 P( ]zx2967-reset 10e10060.toprst: reset controller cnt:32
* s- |/ ~ X! M0 Hzx2967-reset 10e10070.localrst: reset controller cnt:649 O% r3 G! ~! K3 @4 o% K8 |7 P
zxic-pinctrl 10e20000.pinctrl: invalid pin list in gpio-range node
4 s* y+ ^8 ~3 L8 _zxic-pinctrl 10e20000.pinctrl: invalid pin list in bank-range node
0 H* l* b+ {* F10d0d000.serial: ttyAMA0 at MMIO 0x10d0d000 (irq = 16, base_baud = 0) is a PL011 rev1
6 o) Z8 w7 U% d7 u# bconsole [ttyAMA0] enabled
; c5 M) E4 P! e& Dzte-msi 1f400000.msi: zx pcie msi probe enter!!!!!!+ }; h' F2 l# z0 A+ S( i
zte-msi 1f400000.msi: parent_node->name : interrupt-controller# Z; J/ c4 F" L& a0 o0 I8 @
zte-msi 1f400000.msi: parent->name : :interrupt-controller@00500000-1
$ e0 V3 N3 I8 S3 g- c/ k- Q: Hzte-msi 1f400000.msi: zx pcie msi 1 initail!!
8 { {7 G; }1 I/ v: qzte-msi 1f400000.msi: dbi_base : 0xffffff8009400000+ E; ]& \ c! W6 e+ c
zte-msi 1f400000.msi: vector_phy : 0x10e00004
, _( y2 L+ L" Szte-msi 1f400000.msi: num-vectors : 0x209 X4 z: e/ y- a$ T# t* F
zte-msi 1f400000.msi: status-of-woe : 0x0
! [- w+ H0 A _# Y( Yzx-efuse 14f11000.efuse: efuse init ok, clock rate = 25000000- C' y- P. Y# B# z
vgaarb: loaded
~, M5 p$ S# s9 gSCSI subsystem initialized
, P% O ?$ X7 husbcore: registered new interface driver usbfs8 ]2 w" {& f' c7 }6 X$ b
usbcore: registered new interface driver hub
( z; g9 |3 @2 Q, `3 V* ]5 lusbcore: registered new device driver usb6 K" K. N. |. u3 ]" A
clocksource: Switched to clocksource arch_sys_counter8 Z3 f( u2 u0 x
VFS: Disk quotas dquot_6.6.0
) R, ]; F- G! eVFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
, I% ^4 k9 b& G8 U0 C: Czx_gpio 10d10000.gpio: ZX GPIO chip registered7 W: E5 f2 c6 L B; F/ x* q
vid is [0]
+ O( x+ p% Q! n( p6 N) wzx_gpio 10d10040.gpio: ZX GPIO chip registered, a) B- `6 h) P5 g4 }
vid is [0]
. p# t: G0 [; s# x" z) ^) y gzx_gpio 10d10080.gpio: ZX GPIO chip registered7 ~% s0 o" c3 C* e
vid is [2]
- J8 I' D U3 Y1 x' n/ gzx_gpio 10d100c0.gpio: ZX GPIO chip registered& F/ _1 x& ^9 I; L0 |) m4 o$ I
vid is [2]
% F, H: b$ p5 L9 Y2 G+ Qzx_gpio 10d10100.gpio: ZX GPIO chip registered3 [. p t2 j5 i. D. s, w
vid is [2]( v1 J3 E7 y- S& u$ E9 Y q& }
NET: Registered protocol family 2; y, r' G" Q* F" S& t, R# p
tcp_listen_portaddr_hash hash table entries: 256 (order: 0, 4096 bytes)) y! o" P6 p u
TCP established hash table entries: 4096 (order: 3, 32768 bytes)9 H5 J8 N7 _2 @0 T; O" u# f7 Y
TCP bind hash table entries: 4096 (order: 4, 65536 bytes)% F# Q0 o! x; r7 Z
TCP: Hash tables configured (established 4096 bind 4096)
, F" b8 S! ~$ B. d/ _" r" iUDP hash table entries: 256 (order: 1, 8192 bytes)
8 D1 n4 s1 j: n6 Z1 K k5 WUDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
- V, d0 [* X0 H( M9 ZNET: Registered protocol family 1; j& q# E8 ]+ w
Trying to unpack rootfs image as initramfs... B7 M* G$ @9 l$ T- V
Freeing initrd memory: 16420K
" T& `/ S2 c/ f" ]7 XInitialise system trusted keyrings
& H# z: R o8 L% z5 Cworkingset: timestamp_bits=46 max_order=17 bucket_order=08 q0 C5 @- m! e4 `& @% W
exFAT: Version 1.2.9/ c* X& d3 \! a; E! t J
Key type asymmetric registered/ G( D# W: D! t: w
Asymmetric key parser 'x509' registered# i' _2 j9 o8 L" V( y. f. n! g
io scheduler noop registered9 v1 w2 t4 v) |" E
io scheduler deadline registered
6 g5 f- y: s6 }& Z5 F7 uio scheduler cfq registered (default)
2 k( K! f. `7 F# _! u# e$ H5 ]io scheduler mq-deadline registered. U9 A3 g3 I7 b! F1 b2 H; j( D
io scheduler kyber registered% s. V6 d! V b
interval tree insert/remove
# e) g. l+ y* v7 e# m( J -> 884 cycles
3 \# g* I$ {! M" B/ _interval tree search
2 F0 U# m" M( C6 L2 t -> 5278 cycles (2692 results), [. q, r% |7 o ^
zx_spi_probe: enter
`; u7 }0 V" S" q3 lzx_spi 14f06000.ssp: Failed to request TX DMA channel/ K A: y/ N3 s3 M- l- k
zx_spi 14f06000.ssp: Failed to request RX DMA channel$ h# a: Y0 @0 [% C9 i; v# }
spi spi0.0: zx_spi_setup: mode 0, 8 bpw, 500000 hz) N X# z- V$ \$ F; `% x
zx_spi 14f06000.ssp: set rate to 961539
& N2 E" I: l" w7 [+ }1 Y( C7 Yzx_sfc_probe: enter
# k0 O+ S( p6 Azx-spifc 10d0f000.spifc: spifc rate is set to 125000000
" y2 O6 Q( c6 D# D% |zx_mdio 14f01000.mdio: mdio not set pins
/ Z8 n7 [+ o) N7 q2 `8 z. L) \zx_mdio 14f01000.mdio: Cannot found phy-power property in mdio- t, F. A2 C$ L- _, L
zx_mdio 14f01000.mdio: MDIO id = 0, clock = 2500000; m- _2 ~# @# S. D" m% M
zx_mdio 14f01000.mdio: MDIO probe success!7 A% G/ ^- T* }$ d& b0 S
zx_mdio 14f02000.mdio: MDIO id = 1, clock = 25000005 v1 B: Z* [# ^, B) b
zx_mdio 14f02000.mdio: MDIO probe success!4 [ N) }& j$ \, z/ ]' ?
zx_i2c 14f03000.i2c: zx_i2c_probe
1 h p/ N; u+ K% h; A! H<drivers/soc/../../../../../component/linux/common/i2c/i2c_zx.c> before i2c_add_ numbered_adapter i2c->adap.nr is -1
( A! Z( x$ r4 h( E. }7 x0 L<drivers/soc/../../../../../component/linux/common/i2c/i2c_zx.c> adapter_id is 0 L+ V; A* |( n: c# \9 m, v
<drivers/soc/../../../../../component/linux/common/i2c/i2c_zx.c> after i2c_add_n umbered_adapter i2c->adap.nr is 03 U. ?6 Q6 E/ E9 w" L% C
zx_i2c 14f03000.i2c: clock rate is 25000000
1 E7 C# H X5 H4 h7 uzx_i2c 14f03000.i2c: zx i2c0 probe succeed.
3 q5 s2 T. c4 @: o8 rtdm registered!/ J! B8 |# ^, `' X: a( [8 _) `
zx_tdm2.0_probe!/ l' c# _& p ?: |4 C8 X
g_tdm_buf =(____ptrval____),9f138000
* ^- }" N! w4 T6 H Otdm irq=28
6 r# l; `/ b9 v/ w5 q) itdm binding cpu1....
8 Y- Q' u/ c8 k- r6 M) Ztdm softirq/ n( S) B/ X f4 m+ X
zx_axi_tdm_setup
7 z1 Z J8 Z! T" S( @ Kzx-pwm 14f10000.pwm: zx_pwm_probe done.3 @5 ? c5 z4 x+ N* L9 E; i0 P# [
zte,zx27913x-pcie 15200000.pcie: zx pcie probe enter!!!!!!8 p0 T; ], J6 [* A
zte,zx27913x-pcie 15200000.pcie: Link down work initialization completed4 m- Z# T% A: B, l( T. P3 y) l' F
pcie@15200000:Initialize pcie's phy!!!
$ W: }7 T, ^- D7 C! \" @& upcie@15202000:Initialize pcie's phy!!!' g4 i+ B6 S$ n+ E4 b: V" R
random: fast init done
& v+ ~2 o+ K0 m8 I! fzte,zx27913x-pcie 15200000.pcie: host bridge /soc/pcie@15200000 ranges:
7 Y4 H, j' ] ]. [) d# ^. Gzte,zx27913x-pcie 15200000.pcie: IO 0x2f000000..0x2f0fffff -> 0x2f000000: G# x4 t* ]- G
zte,zx27913x-pcie 15200000.pcie: MEM 0x20000000..0x2effffff -> 0x20000000+ @. S5 i# k8 r A* `
zte,zx27913x-pcie 15200000.pcie: dbi_base = 0xffffff8008e25108 link up val = 0x 51
5 F6 w1 F3 [$ x3 bzte,zx27913x-pcie 15200000.pcie: Link up, speed reg = 0xb0120000
. y7 |) M7 K2 izte,zx27913x-pcie 15200000.pcie: PCI host bridge to bus 0000:00
- l; U" p. M, a- b6 x) A" epci_bus 0000:00: root bus resource [bus 00-ff]
' t/ p+ M, H6 G$ V# P& e" Xpci_bus 0000:00: root bus resource [io 0x0000-0xfffff] (bus address [0x2f000000 -0x2f0fffff])
, Q7 X: f' g. j' mpci_bus 0000:00: root bus resource [mem 0x20000000-0x2effffff]/ {" f' m! q; }% s
zte,zx27913x-pcie 15200000.pcie: enable MSI ok
) G$ s! c8 R+ a" i* N" T. }' p4 npci 0000:00:00.0: BAR 0: assigned [mem 0x20000000-0x200fffff]; u0 R: {+ \* X9 |
pci 0000:00:00.0: BAR 8: assigned [mem 0x20100000-0x201fffff]1 ]' f( T' J& W$ |" M- Q. ]
pci 0000:00:00.0: BAR 9: assigned [mem 0x20200000-0x203fffff 64bit pref]
/ ~! A$ ^2 A' fpci 0000:01:00.0: BAR 0: assigned [mem 0x20200000-0x202fffff 64bit pref]
* }7 [( F( ~" I8 ^pci 0000:01:00.0: BAR 2: assigned [mem 0x20100000-0x20107fff 64bit]
4 T$ m9 i' ]/ U9 Z2 upci 0000:01:00.0: BAR 4: assigned [mem 0x20300000-0x20300fff 64bit pref]
# Z6 F2 d6 V! V; g, |pci 0000:00:00.0: PCI bridge to [bus 01-ff]! F* V% ?- z- {4 }
pci 0000:00:00.0: bridge window [mem 0x20100000-0x201fffff]
. ~2 M' ^" a+ w0 F1 _8 H/ Rpci 0000:00:00.0: bridge window [mem 0x20200000-0x203fffff 64bit pref]
5 t& {9 ?" L# A: y' spcieport 0000:00:00.0: Signaling PME with IRQ 32" u/ H5 d9 c1 i _ X$ w
pcieport 0000:00:00.0: AER enabled with IRQ 32) O' F1 m0 T6 l3 x. \
zte,zx27913x-pcie 15200000.pcie: Request pcie link down irq [25] ok
& A' m, x) S0 s! _4 Ezte,zx27913x-pcie 15202000.pcie: zx pcie probe enter!!!!!!" C: E$ e1 g& M$ z+ W9 m
zte,zx27913x-pcie 15202000.pcie: Link down work initialization completed( n1 Y9 M( O ^; O; T6 G, a
pcie phy has been initialized !!!!!! F" ]6 K' _# f
zte,zx27913x-pcie 15202000.pcie: host bridge /soc/pcie@15202000 ranges:
& }" X7 X3 W1 Szte,zx27913x-pcie 15202000.pcie: IO 0x3f000000..0x3f0fffff -> 0x3f000000
- Z1 q0 }+ v y+ T _zte,zx27913x-pcie 15202000.pcie: MEM 0x30000000..0x3effffff -> 0x30000000! C) M" C, a J7 l, G% m
zte,zx27913x-pcie 15202000.pcie: dbi_base = 0xffffff8008f33108 link up val = 0x 51; m4 |) l) t1 O: ^- Y" S
zte,zx27913x-pcie 15202000.pcie: Link up, speed reg = 0xb01200001 R N. J( s) ]$ |- T! V" }! d1 r
zte,zx27913x-pcie 15202000.pcie: PCI host bridge to bus 0001:00
; F/ w8 D& V7 x$ [; k/ \9 E- b5 Y9 wpci_bus 0001:00: root bus resource [bus 00-ff]
; Z8 _8 l L0 A2 ^3 cpci_bus 0001:00: root bus resource [io 0x100000-0x1fffff] (bus address [0x3f000 000-0x3f0fffff])6 W& i* v" d$ Y- G4 Q% h- L0 n
pci_bus 0001:00: root bus resource [mem 0x30000000-0x3effffff]- D7 H; R+ x6 E
pci 0001:01:00.0: 4.000 Gb/s available PCIe bandwidth, limited by 5 GT/s x1 link at 0001:00:00.0 (capable of 8.000 Gb/s with 5 GT/s x2 link); u6 F! @# L9 j) M+ n7 N
zte,zx27913x-pcie 15202000.pcie: enable MSI ok, z; B" v' X0 ]; m) ?9 c
pci 0001:00:00.0: BAR 0: assigned [mem 0x30000000-0x300fffff]8 j" d% c2 c7 t
pci 0001:00:00.0: BAR 8: assigned [mem 0x30100000-0x301fffff]
) K) n% u7 ?/ |1 ~$ Lpci 0001:00:00.0: BAR 9: assigned [mem 0x30200000-0x303fffff 64bit pref]
9 m& ^% c1 C7 t0 ~# b; Cpci 0001:01:00.0: BAR 0: assigned [mem 0x30200000-0x302fffff 64bit pref]) O( I, n% W" g: y
pci 0001:01:00.0: BAR 2: assigned [mem 0x30100000-0x30107fff 64bit]
$ k9 ]6 N' H& Q; A4 \# E' epci 0001:01:00.0: BAR 4: assigned [mem 0x30300000-0x30300fff 64bit pref]
$ J/ w# f1 G* H$ d3 Mpci 0001:00:00.0: PCI bridge to [bus 01-ff]! p* i) L6 x3 O7 P; x5 `
pci 0001:00:00.0: bridge window [mem 0x30100000-0x301fffff]4 C) n/ b7 u, w) [1 [7 ~8 V0 W: Q6 Y. Q
pci 0001:00:00.0: bridge window [mem 0x30200000-0x303fffff 64bit pref], K- ^6 i3 q- v+ R( q6 {0 \( V
pcieport 0001:00:00.0: Signaling PME with IRQ 34
- f7 J1 M' H1 a3 |! \' ?# T' }. ^pcieport 0001:00:00.0: AER enabled with IRQ 34# }# Z) s6 N$ B4 x6 B
zte,zx27913x-pcie 15202000.pcie: Request pcie link down irq [26] ok
' Q* y9 u) J, Y8 Vzx_pvt_sensor_cln22ulp 10e70000.pvt: Enabled with temp 0x11e& d* y$ h6 _* f( l
zx_thermal_init end* T5 J+ f; u! @/ l9 W9 P: ^4 o
zx_pvt_sensor_cln22ulp 10e70000.pvt: probe ok, clock rate: 1190477
& M+ [. i/ P9 _/ r<pdt_wdt_init>(485):create proc files for watchdog!!!
3 c! T' k" M* @. t2 Y. k5 K<pdt_wdt_init>(490):Starting Watchdog Timer...
4 N3 x+ w0 Y% B$ h- @, Z$ W% `wdt debug: nr_cpu_ids= 2, r6 X% j& |+ ]/ j' }. @
zx_wdt 14f09000.wdt: zxwdt[0]: heartbeat 8 sec, clock 20488 E6 R& s1 n0 G4 o0 i0 l4 k
<pdt_wdt_init>(490):Starting Watchdog Timer...2 k7 |* n/ F. N/ j
wdt debug: nr_cpu_ids= 2
3 _: K, R" U- d' |( ]zx_wdt 14f0a000.wdt: zxwdt[1]: heartbeat 8 sec, clock 2048
5 E/ `/ e$ p' P2 U3 a<pdt_wdt_init>(490):Starting Watchdog Timer...
+ { I4 Z" B* Y& j9 V! p/ pwdt debug: nr_cpu_ids= 2: B, i' {2 U. T! ^; P& Q
zx_wdt 14f0b000.wdt: zxwdt[2]: heartbeat 8 sec, clock 2048/ ~9 |2 k+ y% x0 a1 H6 S
<pdt_wdt_init>(490):Starting Watchdog Timer...' `2 L& N; m# f+ ]# a
wdt debug: nr_cpu_ids= 2
" L% \( B" y( ~zx_wdt 14f0c000.wdt: zxwdt[3]: heartbeat 8 sec, clock 2048: v! L0 \- s: F+ w6 B2 ^
success to get board info- m) T, z- s# e; D u
success to get cpu info, l) e2 O4 B# @' }
success to get port info
# ?& o B2 k J" O; \success to get enet info" ^2 l1 |8 e+ B2 G+ k+ b
success to get optical info
& v# t2 ?2 M9 f2 Rzx_board soc:bdinfo@0: Property 'pots_info' cannot be read, ret: -22.
* U8 q( h; M1 b: w, ?success to get pots info
5 V W( x9 B+ esuccess to get ge info( F0 b8 R- d# E% v5 ~2 g
the count of outerphy_desc is 3!6 m# A7 E6 O/ a( d/ M' J5 @
the outerphy_mode of outerphy_desc: 0!
6 B+ i! J' i8 fphy_name:[]_[0]# D% ?7 j6 R% z: M B! R" U
the outerphy_mode of outerphy_desc: 0!
8 Q3 E2 o& V4 l6 l# s$ s) u+ X! hphy_name:[phy_RTL8226]_[1]# W! w% p9 j! C1 i0 ?
the outerphy_mode of outerphy_desc: 0!
& s l5 R% Y: \6 Pphy_name:[]_[2]
, t! L1 u: L$ }' Z# ^4 z$ p4 hsuccess to get outerphy desc info0 \ H4 i: L4 V" Q
zx_board soc:bdinfo@0: vid: 2, name: TDY09, zx board probe ok.
: v; Y1 U" z% r: _' Msuccess to get board info
7 M2 n3 @$ ^/ g# F Rsuccess to get cpu info
- H8 v2 X; T g* O6 I# @success to get port info
& `' Q: [) {( ~" y [8 l/ }$ bzx_board soc:tdy0a_4@0: Property 'vid_list' cannot be read, ret: -22.% k) o9 ^/ c9 b7 B+ G& S1 w
success to get enet info' q4 b" b: P: ^3 E- }0 D
success to get optical info
" e1 v) s. E# \/ Jzx_board soc:tdy0a_4@0: Property 'pots_info' cannot be read, ret: -22.
. {" M7 N5 ]: }7 l1 |. w/ nsuccess to get pots info# Y, ?+ a+ x6 x6 I9 c6 D; [% \0 n
success to get ge info
6 F9 w; H: Q' \7 h M# I" h3 H7 F kthe count of outerphy_desc is 3!0 v M2 x0 h. j
the outerphy_mode of outerphy_desc: 0!
4 _5 R# j7 q% Q9 u1 m; e$ s; Rphy_name:[]_[0]
3 c4 C8 g E! F S+ Qthe outerphy_mode of outerphy_desc: 0!
( A8 i, a, o6 t( ?7 L' Y: P4 lphy_name:[]_[1]8 m8 D, \2 K4 s
the outerphy_mode of outerphy_desc: 0!
% u) U) f$ j8 e3 p' z1 E# \phy_name:[]_[2]
9 Q. G- L, f% k$ osuccess to get outerphy desc info
% k: j" W+ U5 K1 R5 l9 hvid unmatch! try next DTS7 ~) P) y" f8 E& F& T/ E
success to get board info0 M" G* g! |% q" _! u( Z
success to get cpu info. J3 K/ d9 Y1 q! A: o* v* o. N
success to get port info8 Z+ V2 Q' @! z# m
zx_board soc:tdy0a_5@0: Property 'vid_list' cannot be read, ret: -22.
9 |% H! v6 [( D/ n/ r' y. ssuccess to get enet info
( Z# A8 o) D% W0 G+ @& u0 qsuccess to get optical info$ w) b: ~2 v' A5 C5 R
zx_board soc:tdy0a_5@0: Property 'pots_info' cannot be read, ret: -22.
. s) w0 G- M* F, l; nsuccess to get pots info& |8 n# i! X! u
success to get ge info. n+ [; c' Y! X/ w, r5 h; |8 }; I
the count of outerphy_desc is 3!' _9 Q* k: ^' v; s
the outerphy_mode of outerphy_desc: 0!
/ `* V5 B5 X, \/ \7 vphy_name:[]_[0]
1 Q! P8 e6 m4 _6 O. tthe outerphy_mode of outerphy_desc: 0!
/ K5 U% E( M* c, h& \/ I4 ophy_name:[phy_RTL8226]_[1]* g& P" z. V9 H+ p- V
the outerphy_mode of outerphy_desc: 0!- ?& A3 {* D; z' o
phy_name:[]_[2]; s4 E/ j5 E( Y
success to get outerphy desc info7 U% Z/ ]+ X. `4 K3 `
vid unmatch! try next DTS x$ ^0 z! r. |. A( w; f- N5 c1 B& w
success to get board info4 n& P6 ~" w0 i- d6 c
success to get cpu info
& M. ?! v# Z! g5 B/ ?1 Psuccess to get port info; V% I2 y5 u9 t" w1 {5 n+ u! Y
zx_board soc:tdy09_0@0: Property 'vid_list' cannot be read, ret: -22.
8 N8 C* `9 A7 g1 ~, S j+ d3 a/ rsuccess to get enet info
. D/ R% B i( g0 P3 L* m7 `1 ksuccess to get optical info4 Z/ `" K; X2 U' @ j. N( c. S
zx_board soc:tdy09_0@0: Property 'pots_info' cannot be read, ret: -22.. k/ V* d. S6 t* V
success to get pots info
0 H: w" c9 r# e+ Gsuccess to get ge info
3 g; H" V0 @# `8 Rthe count of outerphy_desc is 3!" }0 j3 c; @" I' y# g5 Z; z" {
the outerphy_mode of outerphy_desc: 0!3 X$ M4 S8 t$ |0 G* `. v8 D
phy_name:[]_[0]; e( z& J1 [) P( w& Z
the outerphy_mode of outerphy_desc: 0!/ i8 p& N2 M. W8 W0 o
phy_name:[]_[1]. r; O I* d% X: G( B; I
the outerphy_mode of outerphy_desc: 0!1 y8 A; J/ M0 B+ @ O8 {- K
phy_name:[]_[2]
" U6 I: w( X# a/ _$ hsuccess to get outerphy desc info
" g& k9 M# B, j7 X1 u0 j7 Rvid unmatch! try next DTS
! h+ M3 W% O- v- t5 zsuccess to get board info
7 w. t% Z9 v: Y' o& Ysuccess to get cpu info
- v% M6 |; I5 e, p8 k! {success to get port info5 B' r! W+ K) ?7 Y& N" f C
zx_board soc:tdy09_1@0: Property 'vid_list' cannot be read, ret: -22.
' ~( t e4 V1 gsuccess to get enet info, n4 k" e3 }# F% k- {' d
success to get optical info& p( F/ w; A2 t) \* M( c/ ]9 t
zx_board soc:tdy09_1@0: Property 'pots_info' cannot be read, ret: -22.
6 A g3 o* Y2 d4 C4 r8 ^- Vsuccess to get pots info
! b! g; K+ }' b) dsuccess to get ge info8 S/ J9 {4 e. Z, Z1 f
the count of outerphy_desc is 3!" U- J. I( e0 f$ o6 X
the outerphy_mode of outerphy_desc: 0!& ]: ? o4 r, X# t
phy_name:[]_[0]8 p, ~1 q, a4 w! T3 C
the outerphy_mode of outerphy_desc: 0!7 X9 x0 O/ d8 y
phy_name:[]_[1]+ U& c0 z* i) V
the outerphy_mode of outerphy_desc: 0!$ ~8 m5 o& A- k3 w6 g0 |) j0 N
phy_name:[]_[2]
+ O1 j& A( R9 G: y7 L6 tsuccess to get outerphy desc info
' C" o) v. }0 [) Hvid unmatch! try next DTS3 g" H+ ]( r4 s& l. b
zx_board soc:tfy01_7@0: Property 'board_info' cannot be read, ret: -22.
6 L) _0 A. _/ V; R. _zx_board soc:tfy01_7@0: failed to get board info# F1 L% p. P) J" `0 l. m
cpufreq_zx: zx_cpufreq_driver_init
# ?- x) K/ N" E; S* n) S% R& U9 Nleds DTS probe by vid, successed
! T& l8 t. X7 a5 vzx-leds-gpio soc:leds_2: 4 led has mux ctrl+ h' v; h# q& m+ o1 ]- Q) p
zx-leds-gpio soc:leds_2: alloc devid 101711872" Z+ j" D+ P) m: {, z3 _8 `/ g% [
pon_plat_probe begin...1 _; i) i: K/ A" B4 X5 I6 D0 V- N
[init_pon_plat_np_rsv_mem_cfg] temp_pon_plat_need_rsv_mem= 0x3245000
* N' K- _9 E4 U' X. @[init_pon_plat_np_rsv_mem_cfg] get g_red_cw_in_share_max error! default val is - 12 V# |; z5 w- C- f" n
[pon_plat_get_rsv_mem_cfg] total_pon_plat_need_rsv_mem=0x32450009 o4 Y3 S: B: t, e2 S- D$ o2 x8 u
[pon_gpio_init] Failed to get optical rxsd signal' C6 H! f& s2 K! M2 ]
[pon_gpio_init] Failed to get rtl8367s reset gpio signal
+ U; [3 `- Q/ O7 J[tm_acl_max_item_init] g_tm_max_fast_num=0, g_tm_max_fast_num_v6=0, g_tm_max_fas t_num_l3=0
! e& N7 o. D2 _[tm_acl_max_item_init] g_tm_max_opc_flow_num=0 n( m P4 t' U7 c
[zxic_e8_en_init] g_zxic_e8_en is set to 0
6 s R6 s) c& O7 e7 N9 u[zxic_e8_en_init] g_zxic_e8_en is 0
( R+ j' |6 d! z) k0 K8 e4 c[up_mode_global_init] g_epon_open_high=1 use default!. {- C- \" t4 s- _
[up_mode_global_init] g_epon_open_high=1. ]$ Q3 V+ |8 Y8 a
[up_mode_global_init] bosa_and_switch_ponmode_info=0x5200040,g_switch_ponmode=0x 40,g_kernel_switch_en=0x0,g_multi_bosa_en=0x0,g_bosa_type=0x2,g_switch_time=601 v5 Q0 o1 D! @
[zx_set_upmode_info] g_UpModeInfo=0x40 g_up_mode=0x40 g_is_auto_ponmode=0 g_lanu p_port=0 g_wlanup_port=0 g_wan_port=09 q1 n" f. G" M; G5 n5 H$ E+ P# z( v
[switch_chip_type_init] switch_chip_type is set to 0
$ E) X- k7 |- e. ?; D[mdio_8226_id_get] mdio_8226_id is set to 1
( ^5 J. m; ]6 w1 \) [[mdio_8367s_id_get] mdio_8367s_id is set to 04 z' @3 T; L) K
current_wlan_map is TYPE_133_8SSID.9 p! |4 U; H& f: U, N |
pon_plat_probe end...6 Z' m; s' O7 x
cacheinfo: Unable to detect cache hierarchy for CPU 0
) K0 F7 t: h' v* z# u" Xbrd: module loaded
+ p. F7 D* E7 N. |% _% ploop: module loaded. t9 z+ a9 ^2 W" c) u# v
SCSI Media Changer driver v0.25
6 e/ N W4 [0 {# F2 l# \6 x: rspi-nand spi1.0: ID efaa2200, Winbond SPI NAND was found.0 {: S" V& {! j g3 Q9 X: _
spi-nand spi1.0: 256 MiB, block size: 128 KiB, page size: 2048, OOB size: 128
3 Q8 E0 X. E6 D8 R& qdynamic partitions parse$ B/ T" e! w7 {" H7 p: ~( W$ m! W ^! n) I
Found 256MiB: 256MiB0 {9 }9 e6 z/ b% A
15 dynamic-partitions partitions found on MTD device spi1.0# w; l0 }& r! j' l
Creating 15 MTD partitions on "spi1.0":
# }* M. [: V+ ]5 w0x000000000000-0x000010000000 : "whole"
4 o1 h' i! {- [7 Qrandom: crng init done: E* ^( [/ Y6 t# z
0x000000000000-0x000000200000 : "boot"
' w2 V; y" n2 @1 z2 `0x000004800000-0x000004c00000 : "parameter tags"
. z F7 l7 t' H* e0x000000200000-0x000002200000 : "kernel0"4 Q$ V) Q! W$ h4 T0 o
0x000005400000-0x000005800000 : "middleware" N+ M8 i1 N0 A# m: E- @; T6 r) m
0x000004c00000-0x000005400000 : "usercfg"* m3 h/ L& J* l( I7 O
0x000002200000-0x000004200000 : "kernel1"( z G* x- |" O/ R: h. {5 A
0x000004200000-0x000004800000 : "others"- z! v" `/ U9 g& ~( w9 l3 U* {/ X+ C
0x000005800000-0x000005c00000 : "wlan"
4 K4 Z1 B& t0 C( [3 {1 X+ p0x000005c00000-0x000005e00000 : "phoneapp0"
9 |( o* x; a! p+ x r. {8 n7 g2 z0x000006000000-0x000007e00000 : "osgi0") W: V" Q- J: Y4 h/ v
0x000009c00000-0x00000fc00000 : "plugin_data"
' P% W: W3 V# D( p t# @2 R8 @0x000007e00000-0x000009c00000 : "osgi1"
+ E2 a- o' k! s( b( g, N0x000005e00000-0x000006000000 : "phoneapp1"9 F# `: U9 n7 B& I* z2 x0 ^+ I% M# t
0x00000fc00000-0x000010000000 : "awifi"6 \1 A" m3 R- `" d) `: I
libphy: Fixed MDIO Bus: probed& _7 v( n+ Z5 V( F8 Z9 X
tun: Universal TUN/TAP device driver, 1.6
( H5 B# C8 E) H; A/ S/ _9 m7 r& g+ C0 wthunder_xcv, ver 1.0
( o t# Z) ?6 d: uthunder_bgx, ver 1.0
; i. l0 k5 h( X: f! O+ pnicpf, ver 1.06 I \3 G9 l" \- S; ~0 I
PPP MPPE Compression module registered
+ U6 e8 n( D! y3 I/ \2 aNET: Registered protocol family 24: Y9 O" T& {9 T( }) v0 Y
xhci-hcd 15008000.usb3: xHCI Host Controller6 S6 D/ q+ b4 G: ^# B
xhci-hcd 15008000.usb3: new USB bus registered, assigned bus number 1
1 A) A5 j& U4 Rxhci-hcd 15008000.usb3: irq 22, io mem 0x15008000, M. u& ?! a$ _
usb usb1: New USB device found, idVendor=1d6b, idProduct=0002, bcdDevice= 4.19+ X) d2 k! _4 V8 C0 W
usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
* N; K1 _: H2 ^2 N4 q5 e! dusb usb1: Product: xHCI Host Controller. o6 n4 ` M1 M% c
usb usb1: Manufacturer: Linux 4.19.136+ xhci-hcd
& P: Y1 z8 {, d) a+ Y- N+ lusb usb1: SerialNumber: 15008000.usb3
# G- C$ n* B' R7 C# `! h) Nhub 1-0:1.0: USB hub found1 A2 z$ @8 x. ]+ D* Q
hub 1-0:1.0: 1 port detected
d1 }0 p# X! f, wxhci-hcd 15008000.usb3: xHCI Host Controller2 _( u2 m" D% h& b
xhci-hcd 15008000.usb3: new USB bus registered, assigned bus number 2
$ l' X( {; ]- b1 M0 x) N& M2 Mxhci-hcd 15008000.usb3: Host supports USB 3.1 Enhanced SuperSpeed" {* i% Q- N+ G/ o
usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
- u* Z2 D9 s/ l6 v6 h# busb usb2: New USB device found, idVendor=1d6b, idProduct=0003, bcdDevice= 4.19+ |( {$ G& t- X8 S/ I/ C
usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
. \+ ? \7 |: ]: h/ Zusb usb2: Product: xHCI Host Controller
0 |& P0 _2 q; y+ R5 M, b: kusb usb2: Manufacturer: Linux 4.19.136+ xhci-hcd
5 Q# o! C9 B' p, Pusb usb2: SerialNumber: 15008000.usb3 e$ W; W v+ y% B+ d7 s5 {, t
hub 2-0:1.0: USB hub found l0 x) S D+ C& `: D& C2 ~2 s
hub 2-0:1.0: 1 port detected+ M+ {2 g5 k' j' k$ ]/ @+ Q- l
xhci-hcd 15010000.usb3: xHCI Host Controller
0 N: o, @: q. p' T, M; {+ O! Jxhci-hcd 15010000.usb3: new USB bus registered, assigned bus number 3
0 I! x+ A( }' W5 u; @% hxhci-hcd 15010000.usb3: irq 23, io mem 0x15010000
& X; i$ I* s/ `usb usb3: New USB device found, idVendor=1d6b, idProduct=0002, bcdDevice= 4.19
2 w3 m S/ g/ P% G6 Husb usb3: New USB device strings: Mfr=3, Product=2, SerialNumber=1
3 X; V' ?+ R- ]+ L% L+ y! gusb usb3: Product: xHCI Host Controller1 M5 L$ g0 r4 e n0 ~
usb usb3: Manufacturer: Linux 4.19.136+ xhci-hcd
8 B5 e- D8 s" k7 I8 |usb usb3: SerialNumber: 15010000.usb3
$ n# p8 t* A! W$ V+ Ahub 3-0:1.0: USB hub found
& I6 T/ W: j$ A' Whub 3-0:1.0: 1 port detected
3 L- F5 u) P( p% v7 txhci-hcd 15010000.usb3: xHCI Host Controller
) K0 j6 ^. g$ {4 _$ axhci-hcd 15010000.usb3: new USB bus registered, assigned bus number 4
/ K7 `: p( u" {% v K3 hxhci-hcd 15010000.usb3: Host supports USB 3.1 Enhanced SuperSpeed! c2 b/ h/ V2 @; h. P! f3 K
usb usb4: We don't know the algorithms for LPM for this host, disabling LPM." O9 |8 K. K$ R5 | q9 ?3 c
usb usb4: New USB device found, idVendor=1d6b, idProduct=0003, bcdDevice= 4.19* b& K; x6 T& y& l' [$ W$ Q9 N; a a6 E
usb usb4: New USB device strings: Mfr=3, Product=2, SerialNumber=13 Q' Q/ t5 [2 D6 w& C7 E8 ]6 y
usb usb4: Product: xHCI Host Controller. B' g6 {/ b+ ~" x3 ` ~$ ?# Q5 K% P
usb usb4: Manufacturer: Linux 4.19.136+ xhci-hcd# x3 V; ?6 F0 L& d' r
usb usb4: SerialNumber: 15010000.usb3
$ r4 A& s) L7 S1 `/ X/ O$ A! zhub 4-0:1.0: USB hub found3 i+ r5 B9 x* a! ~* w
hub 4-0:1.0: 1 port detected
0 @3 ]7 B) {2 C: Z2 w! rusbcore: registered new interface driver usb-storage
. ?( @9 a7 j' @usbcore: registered new interface driver usbserial_generic
% b7 Y$ M' `+ c8 c! T; Fusbserial: USB Serial support registered for generic. _; w9 e( i$ ]$ I+ L2 h
usbcore: registered new interface driver cp210x. ^, s, {3 ~- E
usbserial: USB Serial support registered for cp210x# b- S. N/ {8 u# ~
usbcore: registered new interface driver pl2303
! r. }2 \* l" ~# f4 f8 W2 ]usbserial: USB Serial support registered for pl2303
7 J' D0 d# e! I4 I4 e" l, ji2c /dev entries driver3 j# o$ m* i: [1 I) {. a' D
u32 classifier* v4 M+ e* [4 s0 c
xt_time: kernel timezone is -0000; q: |" @+ R- Z6 G+ N/ z$ ?
zte--oss cpu usage module init
7 z- D" j, m8 a4 l[kernel com_ioctl_dev]:comdev init enter
, h {8 b: ~; ?; g3 r& d T[kernel com_ioctl_dev]:comdev init sucess
6 a: G' A" A! j1 Q) W11930:23:06 [Klogstdio][Info] [(886)LogStdioProcInit] LogStdioProcInit
9 b7 k2 r# m! X# J4 P- }# ]; y0 i
3 M! u4 E: y- V1 j5 p6 l8 p' |LogUdpWatchProcInit7 [; `! c- f. r& P% V2 e4 R+ T
detail_process_init start
& k# ?. @' t- w3 f2 {% kInitializing XFRM netlink socket
& k: c2 E* o' \. qNET: Registered protocol family 10
' v: k& B2 }) b# i5 s$ nSegment Routing with IPv6
5 H/ t* n7 S' ?5 U( u5 e5 A, usit: IPv6, IPv4 and MPLS over IPv4 tunneling driver5 e4 ^- t' _+ [6 H7 Y
NET: Registered protocol family 17
4 A) b6 o- Y" pNET: Registered protocol family 15 w9 V o) }8 A0 [0 Z& v* d
Bridge firewalling registered3 W9 Z7 \$ o6 ~+ B) |* I! h/ F
l2tp_core: L2TP core driver, V2.0
# |$ k" }- h. ]5 jl2tp_ppp: PPPoL2TP kernel driver, V2.0+ J5 {4 b) F d0 Q8 q+ @& i$ L
8021q: 802.1Q VLAN Support v1.8
; L8 d+ u* U# b' ^& ]8 t( T8 HKey type dns_resolver registered
0 }; e1 g. X3 j) v# S) X/ f. q, |7 ELoading compiled-in X.509 certificates D ]' K3 P3 |: ~9 ~1 p
Loaded X.509 cert 'Build time autogenerated kernel key: bd6a5cb9563a2184cd950e56 662eabd273edf53e'3 O: R: O( ?8 y& g, o
Key type encrypted registered6 o+ h6 l2 ~3 R4 d$ P9 B! N
zx_gpio_keys: zx gpio keys probe* n s+ \$ ^! |7 K: j2 ?7 @
keys DTS probe by vid, successed) d# L! m- Y& `
input: soc:keys as /devices/platform/soc/soc:keys/input/input0: n2 Z+ K0 }. A' j
br_uc_ffe_init registered melon @
/ a/ a# ~$ E# e8 [0 x/ s \ {QOSBw module init5 Z( `/ p" b. H( y q
4 C, _$ Z) D1 t4 P
==========zxic_notifier_init success=================
, ^3 C7 a# N( o: e' b( }multivlan cache ini7 ^* k( m) t' g/ [" q0 v3 K% N' T
br_multivlan_init registered melon @2 a% G/ [% k1 N% o- V
br_vlantci_init registered melon @8 R5 x, A F# | c) o, u5 q
Freeing unused kernel memory: 640K
1 Z; _7 P i" q% `3 jRun /sbin/init as init process
: P/ ?: m$ y+ ?dmounting /dev/mtdblock2 to /tagparam, wait ...8 i& q& G8 g; ^
jffs2: jffs2_scan_inode_node(): CRC failed on node at 0x003437c8: Read 0xfffffff f, calculated 0xf3a43fef
% y; u! c& [6 sjffs2: Empty flash at 0x0034383c ends at 0x003440001 c6 T5 H% k+ ^0 n$ ?; j1 ^
jffs2: jffs2_scan_inode_node(): CRC failed on node at 0x003447c8: Read 0xfffffff f, calculated 0x58b84118 D- v9 M1 l4 U
jffs2: Empty flash at 0x0034483c ends at 0x00345000
" ?: z4 C4 Q; gjffs2: jffs2_scan_inode_node(): CRC failed on node at 0x003487c8: Read 0xfffffff f, calculated 0xbec1c4c6
# U0 D4 W( s5 o& _) {8 H+ djffs2: Empty flash at 0x0034883c ends at 0x00349000
% F f; v; O4 N! b8 b7 q' A: Gjffs2: Empty flash at 0x00349928 ends at 0x0034a000
( |7 z! z. v$ _& g' S) [djffs2: Empty flash at 0x003c0830 ends at 0x003c1000$ F# |7 k% R" @6 R9 r3 y
jffs2: jffs2_scan_inode_node(): CRC failed on node at 0x003c17c8: Read 0xfffffff f, calculated 0x84bace03/ q$ E# m1 w; |7 u+ a" ~; C- U
Mounting ramdisk at /var and /usr/cpkTmp0 Y- _+ x& Q j4 D. t4 i9 w% J
mounting /dev/mtdblock4 middleware to /important_bak, wait ...
$ O3 Z, U1 s, l9 g% Rjffs2: Empty flash at 0x00008948 ends at 0x00009000
- H* }. a3 S1 a" p2 H P* R8 Vjffs2: Empty flash at 0x0000a344 ends at 0x0000a8009 f) R- x3 ]* g
d Mounting /dev/mtdblock5 to /userconfig
5 a' l% |- h8 n; A4 [jffs2: Empty flash at 0x0011b360 ends at 0x0011b800
5 e* Y: [' Z& \7 t& \: Z( a0 Q1 s( ]jffs2: Empty flash at 0x0011d240 ends at 0x0011d8006 Q: H9 l! R3 d3 K- y
jffs2: Empty flash at 0x007795f4 ends at 0x00779800; ^6 s: @4 k! u6 T! \( V$ T8 h8 A6 V
Mount ok!3 _. J) W+ ]2 }
d--------------- otarget is 0 ---------------3 k' ~0 S9 k/ l9 J4 R; D# Y6 o9 ]
************************** mout mtdblock10 *********************( ?7 |- R. D* k2 t5 i2 V) k
ddddjffs2: notice: (924) check_node_data: wrong data CRC in data node at 0x0011e fac: read 0x43c5ce84, calculated 0xbbb11b8d.5 Y! t- d9 ]; J* Q. w3 J2 I A
d' H6 i: S9 k" k1 L
jffs2: notice: (924) check_node_data: wrong data CRC in data node at 0x0011cd98: read 0xeb8464b5, calculated 0x4221e37b.
9 P# w5 j$ V" J% }# d% ]ddd& z) l2 t1 `6 w
d
! ~2 F+ z, M' B. T0 q6 ]8 p7 j( m. y11930:23:10 [U_sk_test][Warn] [mtduserapi.c(694)GetPrivateProfi] start pKeyName= factoryrestore, value=ffffff01!$ t5 G9 \+ M* k
11930:23:10 [U_sk_test][Warn] [mtduserapi.c(807)GetPrivateProfi] end value=0!, x7 ^& _* b$ N, b/ e* F
djffs2: Empty flash at 0x02b4ff34 ends at 0x02b50000
; q) o& C+ @% F8 O) pjffs2: Empty flash at 0x02b52f18 ends at 0x02b53000% O3 I$ B8 F6 W& u! X5 L# ~
dddjffs2: Empty flash at 0x04b28960 ends at 0x04b29000' S: o& m/ M% x7 X9 ~! H# s$ @# \
dd Mount ok!
. K* f ?6 k- x! B0 O) x& F% s--------------- ptarget is 0 ---------------. A3 W' O7 ~3 @( q8 P; T
************************** mout mtdblock9 *********************
# J1 S0 K+ y3 I5 h6 c5 F$ q6 L# V9 o0 ~6 p+ m6 J2 w' ~5 Y- R
sismac region_code 307) D6 Z3 v5 ^$ `: x
sismac region code euqal 307
) f# t( T0 v! D% f/ h* E11930:23:11 [U_sk_test][Warn] [mtduserapi.c(694)GetPrivateProfi] start pKeyName= skyregioncode, value=ffffff01!) |7 ?2 |" |1 o8 z2 `$ J6 [
11930:23:11 [U_sk_test][Warn] [mtduserapi.c(807)GetPrivateProfi] end value=133!# A2 B$ i5 ]; [) `
region code euqal 3070 t E1 T7 `/ |
11930:23:11 [U_sk_test][Warn] [mtduserapi.c(694)GetPrivateProfi] start pKeyName= factoryrestore, value=ffffff01!
9 Y+ [$ l1 `% `! s1 K' \5 i/ C11930:23:11 [U_sk_test][Warn] [mtduserapi.c(807)GetPrivateProfi] end value=0!
, ]8 r# Z- N; P8 G- l Mounting /dev/mtdblock14 at /usr/local/awifi9 R7 `4 a$ h( n
mount: mounting /dev/mtdblock14 on /usr/local/awifi failed: No such file or dire ctory
, P( V- k) g/ Pidx_bak is not empty [307]( p1 k( }: v+ b' Y% }
USR_CFG_TYPE_FILE_BAK flag is ok [307]
6 {% i* l' u$ m$ w x! E- F7 ymounting /dev/mtdblock8 to /wlan, wait ...+ N% E+ z1 K, b( b& G; o. q; k
djffs2: Empty flash at 0x00143014 ends at 0x00143800
u6 I0 m1 `+ v4 V* Q# SConfiguring MAC interfaces$ Z* a1 X% T. x% x9 u$ ~# ]
ls: /etc/sysconfig/network-scripts/ifcfg-mii*: No such file or directory
& z5 o; c8 P8 h& N" ]6 WBringing up interface lo
7 T% [* P, g( D( J% \* \: Y*****************set bindv6only********************7 u4 t) v4 v" \5 F6 j" ]. `
init_module: umod=0000000048a13e52, len=262712, uargs=000000007b29053c. g6 o5 H. @7 H) F l! ~. k
bspdriver: loading out-of-tree module taints kernel.* D( J6 V) i1 o' L+ y0 v
bspdriver: module verification failed: signature and/or required key missing - t ainting kernel' x: d% \* x2 J/ ~; k$ W4 G! h! a; G
qupengchao : symname is init_module) b3 X, Q s) e' A
zx_sec_init
+ d+ \. h# U2 D* m; `1 p5 {storage_wakeup_proc_create success!( Y) ^( L- o z% P* \. n7 L
[bspdriver] uboot cmd_line: U-Boot 2.0.0 20241025183308 0x200000 0x0 0x83 0x83 UpModeInfo=0x00000040 regioncode=0x1330 r; @/ }$ l9 D8 H
[bspdriver] bootversion: 2.0.0, bootbuildtime: 2024-10-25 18:33:08
6 t* g8 j9 |' S, f[bspdriver] kernel offset: 0x200000, active partion: 0
/ j1 p7 R; i8 f[bspdriver] no sec mode, read mtd.
' I& S+ h7 p5 }, a0 y; Ns8HardVersion is V2.06 y& X0 y- ^' s i, E- w
s32Description is ZXIC 133 UNI V2.0.0 286632 CM O) \" ], q# O* j0 D
s8VendorInfo is ZXIC
- _7 V v* V6 G: J9 L% F1 C$ }& Ids8InnerVersion is CMDV1.0.0116 A- q6 I! b0 D
phoneapp is 2.0.0: C( G$ U5 F; }+ w5 A; S6 ?
zx_vsinfo_init done; k; N- C7 `+ f _* a
zx_vsinfo_probe ret is 0 p2 I7 Z* z# u% P3 m) [9 v$ N
[DEBUG]zxic_vid_init% B& p4 T n; e, B
start i2c_1 setup.
! M9 d1 g. ?: G( ^9 |0 hcan't get i2c adapter 14 N. x4 B0 I" N9 S; ~
start i2c_0 setup. |/ M7 q8 E$ G+ _5 S a4 |
init chip, g_up_mode=0x40
7 o" K* b5 B, c x, ^8 kGN28L95 read table 0xFF chipname-register success,chipname=0xFF.
0 ?/ L! W9 u$ P. e# ZUX3360 read table 0x86 register(0x80~0x85) success,chipname=.
0 J+ D F/ r, F; }UX3361 read table 0x87 register(0x80~0x85) success,chipname=UX33631.- _; I. S$ w: z c* j
dbsp_mcu_eeprom_mode_select read table register success./ u7 b" Z2 H+ H3 F- O2 d
judge chip select mcu(0x*0) or eeprom(0x*1) mode ! count=0, judge_reg=0xFF.! }) x# ^, @. j: H
bsp_chip_probe count=0, r_data=0x00." z, S: z( g0 o1 S
UX3361 found.% L( i, @ ?* [7 H7 J
bspdriver select mode is MCU.
0 m- R( k- n) F[INFO]zxic_slic_adapter_init init success.
9 ~+ J9 P, Q9 D2 o: A+ |sky: slic_spi_bus_id is [0], fpga_spi_bus_id is [0]
! e1 q3 w( g' Y8 x8 b) S# C) H! |. Gbsp_spi_init can not :spi0.1
4 j& h+ n" F+ O6 f6 l* R P/ ubsp_spi_init can not :spi0.2
. A- O$ {8 z: q! c" d) Ibsp_spi_init can not :spi0.31 y% k+ l* q/ H8 ^
bsp_spi_init can not :spi1.1
' R; ]; {# T4 C' I' ]. s% g6 u( Gbsp_spi_init can not :spi1.2
; h7 B7 l) I) v* c1 @9 Lbsp_spi_init can not :spi1.3
. t& X; P( o$ g8 w+ K; o: ?=== verify slic info ===
& C8 d: f' j# E) m0 A( Qtry mode: 15 l$ `. P( `$ I, O; d
slic mode pcm. C+ b+ O, S, e, }
0x00000008,0x00000008" V' c) z! o1 b. U2 w+ K
zx_axi_tdm_setup
& a: P3 X; A) Wzx_axi_tdm_reset,TDM reset ok( x3 u q) \+ F$ I; \. E
found a port:0 cs:0 ch:0) Q0 V' L5 J' ^) O' w+ l; Q( X" d9 ^
Lantiq chip dxs found!1 ~+ z& M& F6 P
slic_rst_gpio 6 pull down% l+ w/ \, C& V& a9 H7 C% M) e. }) O
dslic_rst_gpio 6 pull down; V/ e3 e3 O" I
kylin630 chip id error! 0x0+ }# ~8 ?+ f8 h/ B7 w( h+ X. I6 @
slic_rst_gpio 6 pull down
& H/ p$ Q" a" z! u, xSiliconlab chip id error! 0x01 A: h9 V, j5 x! X5 P
slic_rst_gpio 6 pull down
9 T, A5 X; p+ ]! h1 @4 Ercn:0x0 pcn:0x0 J1 {" C: O9 u2 x
can't found id.
* {, j% P/ L: s$ j+ w: g2 k3 wtry mode: 2
% J% f3 U9 G& R6 sslic mode isi- ~# }! A7 z$ K R& b% z
0x00000009,0x00000009* Q6 c8 c$ b# s) W# R1 T
zx_axi_tdm_setup% x; r" B. s8 G _
zx_axi_tdm_reset,TDM reset ok
4 w0 b- m3 L4 z# }dfound a port:0 cs:0 ch:0
8 H; e/ E4 }8 Q1 Y! ?& |0 JLantiq chip dxs found!0 h) ^7 r" S; f
slic_rst_gpio 6 pull down
# K; W0 y+ X5 ~- O. ~! Cslic_rst_gpio 6 pull down
1 ?+ C' i' \# U7 S$ c$ t# M3 wkylin630 chip id error! 0x0
4 }0 M8 w( T# Yslic_rst_gpio 6 pull down
, U: E- ]! w- v$ } A U3 S1 BSiliconlab chip id error! 0x0
) [% I0 Z8 e0 q+ j/ ~. e" rdslic_rst_gpio 6 pull down9 x/ e2 `( T+ C- x% T. ~2 Z
rcn:0x0 pcn:0x0
, `) I1 t6 o3 B7 Pcan't found id.' O! x3 G$ F; v5 }( Y% c
try mode: 3
9 B; y% _% z+ }# aslic mode zsi" a5 D7 C; D7 f; r. ^ Q
0x00000009,0x00000009; H& G* \/ Q/ p0 t2 ^
zx_axi_tdm_setup, V" s) r0 k; i
zx_axi_tdm_reset,TDM reset ok
! V3 L! Y2 E0 @6 afound a port:0 cs:0 ch:0
. h p# I, x# r4 aLantiq chip dxs found!4 Q' o* p) B' T# `
slic_rst_gpio 6 pull down9 W' l; J! Q( V6 ?6 b, m3 s
slic_rst_gpio 6 pull down
' K: q( o2 f5 j& Jdkylin630 chip id error! 0xff' h( }3 X* t% P
slic_rst_gpio 6 pull down. l O& p, @2 W7 h! C/ r
Siliconlab chip id error! 0xff
( k) I% p+ [8 Z; H0 A! M* O<3000000008>11930:23:12 [Klogfile][Error] [(1102)CheckLogConfFile] CheckLogConfF ile%CheckRestartCntConfFile
! R: e$ |. z+ V1 a+ u* a% |' U& m. l
slic_rst_gpio 6 pull down
# w2 F$ T* O: H$ X% h" Lrcn:0xff pcn:0xff" n/ _0 A4 H6 v7 o# K' t' U: {
can't found id.8 g& w' ^5 e0 a
verify_slicinfo ERROR$ U9 }$ z f" \5 _- ^1 B- v
siliconlab_line_num: 0, zarlink_line_num: 0, kylin_line_num: 0, total_line_num: 0- E) `- u2 E* n& s2 \
kernel_frw* U+ s; C1 }; {- s2 m* w$ m) H
read: kernel_frw
) y# L+ Y# N) Aread: kernel_frw
, g4 g- U, t$ ^4 H* a# {xmac0 phy is phy_RTL8226+ I! g0 n% B! V2 W- {/ ]
init_module: umod=000000006c23bced, len=67864, uargs=000000007b29053c# {: ?' I! T. b" c0 Y
dqupengchao : symname is init_module# W8 O: v/ z% r' u& B9 v
Start insmod R8226b_init!
9 i' D* o0 X# w; {' or8226b_phy_probe: 576: rtl8226b Phy Driver Probe Done" t) Q9 [2 H0 R: m* R+ A
result = 1
. O- F# @. e, w$ ]/ uR8226b init success!4 g0 _; c, ]$ ^" p
xmac1 phy is
; ^) K" O. R, M8 n. O8 E5 Yxmac1 no use
: y: q( S1 \$ G+ C4 y% finit_module: umod=000000007b00a603, len=5208864, uargs=000000007b29053c
( D) t' {' d7 _8 D, r4 _3 N# Gnp_133: magic '4.19.136 SMP mod_unload aarch64' should be '4.19.136+ SMP mod_unl oad aarch64'
5 q; |1 t! m$ T: E6 N/ hdddqupengchao : symname is init_module0 t B$ }% X; X1 e* F# m3 o. u
init plat module
2 I7 j# J7 e* ~3 m. h5 [zx_timer0_probe: ==========zx_timer0_probe>g_timer0_irq=08 L! ]2 t, U- z5 e
zx_timer0_irq_base_of_init: ==========1>g_timer0_irq=0! X% d7 R1 E$ D0 z$ k
get timer0 irq succeed,g_timer0_irq:14& _$ ~# f6 E) }( D4 [, ^2 j
zx_timer0_irq_base_of_init: ==========>g_timer0_irq=14,timer0_base=0xffffff8008c 8d000; c* P1 k0 U7 c* @' e1 w% W
get timer2 irq succeed,g_timer2_irq:15
) k8 m4 x. [( V( v b% P+ Rpon init7 e* ], Q5 [5 |' f1 d# C
sys_ctrl_base is 0xffffff8008c9d0005 D5 Q E4 W' D" K' b4 [5 y
top_crm_base is 0xffffff80093d0000
6 C9 y2 T( a( _$ Zpin_mux_base is 0xffffff8008ca5000, L; K" H& u0 F/ _
efuse_base is 0xffffff8008cad000
, {- G2 n3 T2 i! Qpon_base is 0xffffff800d000000
; W. g0 _% @& _6 ?5 Vg_pon_irq:29+ O: U8 N( F: v
pps_base is 0xffffff800f000000
- O3 I; H& z# n/ v6 G% t- k" C6 a5 Mnppt_base is 0xffffff80110000009 d v# x2 C9 o `
rgmii_base is 0xffffff8009900000( D/ Q+ r( J6 ^ J9 t+ y
pon_serdes_base is 0xffffff8009810000: T% C0 U& I+ a8 L, g
pon_serdes_pll_base is 0xffffff80098300000 I/ F9 B6 n. s
uni_serdes_base is 0xffffff800a1000008 C! F1 F* f: \0 l$ s# Z$ x& E! U) ]
pcu_base is 0xffffff8009850000; n3 B7 W+ \% t4 F! D) ^7 v5 Z
gephy_apb_base is 0xffffff800e8000003 v# ~1 u; S' o4 d" \% T
idm-intr0 is 40
" j. `- }; J& _* nidm-intr1 is 41- [! g+ w. H) F2 e5 N# e8 z0 M
idm-intr2 is 42
p9 r' e$ U7 C. Yidm-intr3 is 431 t+ l- t" t0 s) o% I# J/ w7 ]
zx_pon_irq_base_of_init: idm_ddr_phy_start 0x80b23000, idm_ddr_size 0xee5000
( z/ U( V2 j9 Dxmac0_pcs_base is 0xffffff8014000000
% l7 G, l" ?9 } ~, ?& [[zx_pon_irq_base_of_init] hol not enable1 B7 @+ e6 Q; ?/ W
enter gpon pon pll cfg( m- [8 z6 {2 b8 v) s6 s) F8 y' L: ^
mode_xgpon_nsyn_cfg1 A1 H6 G1 L8 `5 a# p- y
com_pll_lock_ready
R0 k8 `. f9 y. q& j) Jrx los =0 rx data in
# l7 p1 A- O3 A, \* R2 gcdr_lock_ready
8 G _4 u. N& B, n. P9 o1 D% U/ ^: xpon serdes init succeed% d2 T0 S% p; o0 b8 B5 M' m9 \
pon mode is xg% x t# T3 C/ d4 y1 v5 \( b) {
idm cci enable" e& U! c: L8 s4 z9 ~/ V
CLK_MUX_3 is 0x06713277,CLK_EN_6 is 0x00001fd7.
" f3 r, n2 N' H0 ?9 M$ K$ Q7 p7 Yval =0xffffffff, reg = 0x000000002c1966ab$ E! Z5 d" z5 u4 ]: ^* U/ C5 U2 C6 D
reset val =0xffffffef/ B& l* G/ n: x' z
val =0xffffffef, reg = 0x000000002c1966ab, i% r+ G( y- g1 j
reset val =0x7fffffef
6 E/ k! u( u# r5 ]* xrestore val = 0xffffffef
1 v& ]4 N. z- Q) M; r/ Q( W' Fnppt init done ok. cnt = 04 a: F* Q4 |- z1 B o
val =0xffffffef, reg = 0x000000002c1966ab
/ M* ]( f: c1 g) h& V" E$ trestore val = 0xffffffff
& ` q1 ?7 p% h1 t+ z* h6 tpon int
5 N8 x! M4 @4 Xnppt int/ q. I3 V, t. d$ W* ^6 l
pon probe init ok1 O4 @$ P+ a$ ^0 Z# L& G' }
nppt init start
x; b2 d6 S8 D+ ninit gephy apb base" G. a9 |- a& Z5 b/ s# L0 n7 ^
val =0xffffffff, reg = 0x000000002c1966ab
$ w0 I& w) {' b' G. K4 Areset val =0xfffffffe
% F0 \* k1 i% c( @- frestore val = 0xffffffff" K$ X7 p) P$ z$ u1 C
enter smac_init
" ?' o. o, S. z- _$ u7 A: H0 P' ]smac_init: smac_pkt_filter = 0x80000001, mac = 0x0
6 U0 V5 L+ D4 w3 u Vwrite smac an ctrl ,mac = 0x09 r A2 @% d: [7 L3 _/ F$ \3 G0 ]
read SOPC_CLR_OVER_READY_SMAC = 0x1, mac = 0x0
6 V2 f' D4 `, A0 P1 A; ywrite SOPC_SEND_EN_CFG_SMAC,mac = 0x0
) `1 Z+ h5 m$ V. |) A+ ]" O/ `. Wsopc send enable ,mac = 0x01 [+ u+ M" y8 p7 @0 b! f' m* O
exit smac_init:mac=0x0
+ H0 k" [9 ~& b2 a% L5 h9 h% Cval =0xffffffff, reg = 0x000000002c1966ab
/ f1 t' I+ e: U8 h; z1 `( {& z% Creset val =0xfffffffd
/ K. M/ _* \) brestore val = 0xffffffff
" K) s# } J5 y _, ^# }enter smac_init0 {: c) i8 y# A1 `: l( D
smac_init: smac_pkt_filter = 0x80000001, mac = 0x1$ @/ S7 W8 s, F7 k' }7 X% ^
write smac an ctrl ,mac = 0x14 U! m ^4 m, Z( i& J; T
read SOPC_CLR_OVER_READY_SMAC = 0x1, mac = 0x1: U; _2 h" z1 `$ q* `, e
write SOPC_SEND_EN_CFG_SMAC,mac = 0x14 h$ q/ F0 o5 J& Y8 {
sopc send enable ,mac = 0x1) L' U# V" A0 \: K6 B" n+ r9 Z
exit smac_init:mac=0x1$ E, S7 G* {5 R& {( D! Z; X# S
val =0xffffffff, reg = 0x000000002c1966ab
' o6 h! m; }- ~, x. T3 ~% n4 {3 `& creset val =0xfffffffb( M; i( D- m+ p
restore val = 0xffffffff
2 |0 ]+ w, U9 E& M/ @. Z6 Denter smac_init
+ M9 u) `4 `7 Qsmac_init: smac_pkt_filter = 0x80000001, mac = 0x2. o! |: D W; y+ q3 d' K
write smac an ctrl ,mac = 0x2
9 j. D/ B% Y4 e& t3 a( ~/ n, N2 gread SOPC_CLR_OVER_READY_SMAC = 0x1, mac = 0x2( t! d1 F1 n0 E4 f; p+ I
write SOPC_SEND_EN_CFG_SMAC,mac = 0x2
b1 o1 w4 `/ ~2 S+ Ssopc send enable ,mac = 0x20 u5 P$ n* c" g t$ |
exit smac_init:mac=0x2) [6 S7 @8 r+ ~1 Q
val =0xffffffff, reg = 0x000000002c1966ab: a! [9 _: q; j# f
reset val =0xfffffff7
# d6 V2 o4 ` p) drestore val = 0xffffffff/ E# y# `. g" o9 {
enter smac_init
; x1 y$ I( A+ t' R/ Q- D1 _& y4 Zsmac_init: smac_pkt_filter = 0x80000001, mac = 0x39 a1 F! A& N4 h/ u) i; A
write smac an ctrl ,mac = 0x3
0 i) p: u1 ?6 u$ _; _& Vread SOPC_CLR_OVER_READY_SMAC = 0x1, mac = 0x3! c% w2 M d/ q# D" q5 z+ ^
write SOPC_SEND_EN_CFG_SMAC,mac = 0x39 G& U) X- w; j4 R7 v" ]! @$ N
sopc send enable ,mac = 0x3
1 G: g |0 } K+ z; Oexit smac_init:mac=0x3
: J k5 s1 t# N/ a! g[outerphy_phy_init]ERROR:param-><index:1><outerphy->outerphy_name:0x8af56d9>
8 k2 t' @7 E$ w7 { <outerphy_attr_array[1].outerphy_name:realtek fephy>% m; T( _! D$ o. j3 s, z# {! h
[outerphy_phy_init]ERROR:param-><index:2><outerphy->outerphy_name:0x8af56d9>
' k4 O1 G9 a7 s" a <outerphy_attr_array[2].outerphy_name:phy_88E1322>
/ ]0 N T. [) v& q$ K6 g/ k9 |( Z0 N[outerphy_phy_init]ERROR:param-><index:3><outerphy->outerphy_name:0x8af56d9>
4 A# S3 Y* c5 t/ y# h' G% D- V0 Q <outerphy_attr_array[3].outerphy_name:phy_zx5201># O4 Y4 c3 B, M
[outerphy_phy_init]ERROR:param-><index:4><outerphy->outerphy_name:0x8af56d9>- l! E+ w( C$ _' y
<outerphy_attr_array[4].outerphy_name:phy_YT8821>, m# v) H8 V5 G5 P! K& x
ddd
, i8 [" M. Z: T) m' n! w2 k2 edd[outerphy_phy_init]ERROR:param-><index:5><outerphy->outerphy_name:0x8af56d9>
& X* [8 G6 l( O! i3 G+ X6 | <outerphy_attr_array[5].outerphy_name:phy_RTL8226>4 Q d) v+ v( d1 Y" K" E
0 serdes option is 0. x* ~' J6 _9 q
xmac0 is used
4 S. p& g$ |1 g' z0 A[outerphy_phy_init]ERROR: Can't get outerphy_desc! Plz check about it!. p" q1 I( j5 h8 Z& ^
[outerphy_phy_init]ERROR: Can't get outerphy_desc! Plz check about it!
! {! Q9 D8 W8 g; jmac 0 link down8 w" I' L% w; e
mac 1 link down. U" i8 z) Y0 S, |: p
mac 2 link down
5 K3 N; v L/ ~, r2 Imac 3 link down
6 V. W) V+ T' N0 i& l" x( Zmac 4 link down
; m- p6 M7 E. Z# Q1 c$ M. b1 idm_ddr_base is 00000000b5d0cd85, phy addr is 0x80b23000. u% U1 ?% k, O; {
ddr size(0xee5000), idm used(0xee5000), m- i# f5 [5 E
irq[0] sg_idm_irq_mask_conf(0x71ffbfb)- F5 y+ u9 q$ k! U8 S5 o0 b
111000111111111101111111011. ^2 v N8 q) ~
irq[1] sg_idm_irq_mask_conf(0x200000)
7 |; r( o3 U" U000001000000000000000000000
X0 f+ G. o" D. I% |3 L+ F% L! n {irq[2] sg_idm_irq_mask_conf(0x400000)
. Y: W8 z0 j" m; G000010000000000000000000000
$ _% O8 }+ s" \9 |2 G& Y- l% Qirq[3] sg_idm_irq_mask_conf(0x800404)) H2 G1 f0 u' G8 K( ]
000100000000000010000000100
' V/ z9 u( N0 F/ Oidm net init ok
6 `4 T* r {9 N' v# l; ]+ `nppt init end. ret = 0
" H n' h9 J. _, C8 s% d4 Z" Uinit np_reg module# g& {: r+ \6 G( p4 ?: X
init np start
5 G$ Z( L, E8 Y4 J, ^# Tcreat ddr space for bmu.
Q/ P- S9 t/ b; }4 C' E+ z- I9 I2 ?7 b[zx_bmu_ddr_probe]:ddr space(start:0x81a08000, size:0x1f60000) for bmu
% o0 g; c/ b$ H- t+ v' A6 f$ T( ipp_bppe_pool_init: BPPE_PA_BASE = 0x81a08000
+ ~: r- ^% n1 r" p5 h/ Xpp_bppe_pool_init: bppe_va_addr =0x00000000a5818b11, BPPE_PA_BASE = 0x81a08000
! K! @7 s+ i( u* ^& Q6 G9 ntcont mode is 0 N: t- W( Q3 l7 W1 h! O
ddr space(start:0x83968000, size:0x400000) for hash table4 s4 x! E0 r' z
version: 0x0001.0x0108.0x31ba6a03
# r: h5 t$ v) o; ^tm acl init, ret = 0
- s2 q- F; J: F. J0 E! R7 S[mul_ip_db_init] mul_ip_table_busy_lock!+ S/ q: a& K/ X' f/ [
[outport_and_real_port_map_table_init]real_port: 15 real_queue_id:419
: v9 ^7 m" i+ y \( G' n2 V[outport_and_real_port_map_table_init]real_port: 15 real_queue_id:419 c% D0 k( U( |4 A1 x
[outport_and_real_port_map_table_init]real_port: 15 real_queue_id:419
) G5 r& p+ ]2 ?/ a0 F[outport_and_real_port_map_table_init]real_port: 15 real_queue_id:419
( u& T! f2 R! ]; \' {[outport_and_real_port_map_table_init]real_port: 15 real_queue_id:419
9 D: G& H) C8 K+ w5 m/ a[outport_and_real_port_map_table_init]real_port: 15 real_queue_id:419% ?' l C2 x" @$ g) e5 W3 n" B
[outport_and_real_port_map_table_init]real_port: 15 real_queue_id:419
9 i% \1 V) b, @$ R: s. }" v- z[outport_and_real_port_map_table_init]real_port: 15 real_queue_id:419 _) J. }* U K( o' E" u! X4 ^
user table init success.
4 T9 s6 p, _; ALow power buf start phy addr:virtual addr:00000000ed718e3c
3 }$ {/ M9 }" I4 M0 qcreate xemac_task_thread ok!
* S2 b' Q% l5 f$ b7 [init low power success' s# a- f6 ^) L5 j
init np success& z2 f. X) U! a' C6 P$ J3 ]; T1 G3 H
NP Module SYS FS Init ended successfully =
; O5 J& a5 e9 z0 Uinit np_reg module success
8 q7 X( @) x9 t0 E6 G- T[proc_pon_debug_dir_init] success!: s4 D; x. k, l9 I% j* h
[proc_pon_tm_debug_dir_init] success!
2 m1 x% _; l# o+ a: r! bipsec init enter
& p, w1 F9 Z/ r$ q! E; t+ uipsec hardware driver will not init because the devicetree of ipsec is unavailab le.
. j( V5 ^" R% } @1 epon_sta_filter_oam_omci_cfg_set enter. n) ~1 r6 d J1 ^) c5 b2 M
pon_sta_filter_oam_omci_cfg_set end" `6 b; Y* M% V
current chip is ZX279133+ D4 e( |& G9 C4 c
############################# 133
) n; X4 b8 P% f5 z5 g" T$ T. L, cinit_module: umod=000000006c23bced, len=8792, uargs=000000007b29053c
) \4 p# c" h" M4 H1 x4 s+ Vzx_ponreg_133: magic '4.19.136 SMP mod_unload aarch64' should be '4.19.136+ SMP mod_unload aarch64'
* G2 G2 H$ F- y0 H! ?jffs2: notice: (945) check_node_data: wrong data CRC in data node at 0x02b4eef0: read 0xee37cbcd, calculated 0xd068f8d.
4 D: C$ w1 @" k1 t8 j$ fqupengchao : symname is init_module1 [# e5 Q: `' o( T& O
register fpga driver success, major=222
9 Q4 |: U7 W/ \5 B2 ?( Xjffs2: notice: (945) check_node_data: wrong data CRC in data node at 0x02b54bf8: read 0x68c47d75, calculated 0x8cb69dd4.+ ~& P. G4 L8 R( P4 y7 Z2 @
init_module: umod=000000006c23bced, len=92416, uargs=000000007b29053c4 Y4 V9 }3 S6 S; }: K
qupengchao : symname is init_module
# ]! k9 n( w- J, T) l4 Vinit_module: umod=000000006c23bced, len=5736, uargs=000000007b29053c' ]! ]& N& W7 X+ d# t
qupengchao : symname is init_module
1 \& N5 _9 K0 W: ^* u* ?2 {$ ^7 Jregion_code_init region_code:307, ret:06 z7 Q% q/ F* M/ _% }/ l7 D
init_module: umod=000000006c23bced, len=84992, uargs=000000007b29053c# H5 N+ r# s+ H7 y1 q# Q
qupengchao : symname is init_module0 l% m$ A4 k4 k( j: _1 w2 K7 U$ E
qupengchao : pon0 create success& a% e( l& e" a4 T4 k! b! |
11930:23:16 [U_busybox][Warn] [ifconfig.c(999)ifconfig] SIOCGIFFLAGS7 o, V+ Z. ?; H) q
init_module: umod=000000006c23bced, len=42384, uargs=000000007b29053c4 \. B, J1 D2 n2 ]/ ^
qupengchao : symname is init_module8 u, S2 c: J5 a( C( `: S: i
iprt_data_init success!
5 D7 K* a8 B" yinit_module: umod=0000000067964c36, len=169288, uargs=000000007b29053c
5 j7 P. e, `+ y5 [3 W* [) F9 y. Zqupengchao : symname is init_module
" P8 x3 x7 u1 N2 w0 hinit_module: umod=000000006c23bced, len=48552, uargs=000000007b29053c6 c- w4 z: k2 N- |. E
dqupengchao : symname is init_module
- V8 D2 O8 ]3 a' Sethdriver_init....+ Z4 ], F0 l( [, |' b2 J' E
g_mii_dev_name[0] sw
5 {- C8 R+ G: w0 n0 j. d) Zg_mii_dev_name[1] pon6 t y" x4 E& f7 r3 j: Y. t
init_module: umod=00000000669be306, len=284952, uargs=000000007b29053c* H' y$ ?' \( b
qupengchao : symname is init_module v$ U* i1 ^& I! O' v' C
init_module: umod=0000000098178684, len=853280, uargs=000000007b29053c
& k5 e6 c; ?4 Tqupengchao : symname is init_module6 c* i8 Z9 q1 C/ ^0 Z
Init switch module
/ O* k5 w9 A3 \d[se_eram_table_check_out_of_depth] cur_bit_offset(8192) is out of range
- l" ^8 U) u8 {. [: Z[se_eram_table_get_by_sdt_info] para error: c$ _+ s9 A3 a/ x; M! }# {* O, Q
[se_eram_table_check_out_of_depth] cur_bit_offset(8192) is out of range
6 \& v) [" s) a3 w+ P$ ^( T4 d[se_eram_table_set_by_sdt_info] para error
: L9 B, R) {4 _" B6 g; N! c[port_attr_def_route_mode_en_set] port(64) set table ▒▒#_attr_name▒▒(0) fail* ^& T' Q+ p! S
[tm_port_route_mode_set] set fail
! k; Q! u# V7 R4 j0 linit port route mode fail1 `, I, T9 m$ _; w( |, k3 t! |
sw_cap.SW_ETH_UNI[1] = 4.
! j# q+ e: k" z2 e0 c+ V7 qsw_cap.SW_ETH_UNI[2] = 1.
5 i# B: b K$ I$ W1 u1 @sw_cap.SW_ETH_UNI[3] = 2.
k8 W. u% W0 H# D1 tsw_cap.SW_ETH_UNI[4] = 3.
/ U8 G) O3 p& ~- Gzy uni num:4
5 _7 j/ |0 }$ w5 ]+ s0 Kzy switch all port count:7# N' }6 g' S; h3 p+ ~
switch config 9132 GPON mode!0 ?0 c: b8 [- j+ o- `
[yqs]set cpu queue rate limit to 4000pps
8 Y" g8 C; ~8 b! }" G[SW][sw_init_switch] reg hff
^& e! U9 U6 A) ~% c[SW][sw_init_switch] reg ipsec up hff
* ]3 P) q0 C* o4 v[woe_reg_register] enter woe_reg_register!8 s7 C% h7 G; q9 u
[proc_pon_switch_debug_dir_init] success!6 o' d6 C8 j0 X7 ~! `0 h
create stati1_turn_thread success.
" r$ \ Y; m$ |. N# J. hInit switch module Success6 `: l: N$ D N; f
[zxic_api_sw_upmode_set]input:upModeInfo is 0x40,new_upmode is 0x40,new_lanup_po rt is 0 new_wlanup_port is 0
; I3 H2 R; E0 n6 M3 ~[zxic_api_sw_upmode_set] done
* A }: P# O7 F' Z) {" Kinit_module: umod=0000000033815f7d, len=308856, uargs=000000007b29053c: \) k" a0 A+ `& e
zte_xgpon: magic '4.19.136 SMP mod_unload aarch64' should be '4.19.136+ SMP mod_ unload aarch64'! q3 M) }! D& y3 E
dqupengchao : symname is init_module0 s' L; S3 p" g- q3 `
insmod gponsdk_dev
2 p( f' P) k6 s$ T! h# _XGMAC: VirAddr:0x00000000199064582 V4 Q- ?; x9 s: ]% k0 g
pon mode is xg
) i& F1 L* u) K5 K/ z2 Kinit_module: umod=000000006c23bced, len=66504, uargs=000000007b29053c, B, t: J: [: m7 Y2 C+ n2 z
qupengchao : symname is init_module
2 K0 S$ u5 C4 Wgpon_Init ok
- c0 K! a: L& a: m6 l8 HNo need to load RTL switch chip driver$ x2 W& ]" Z' t( v7 A
init_module: umod=000000006c23bced, len=47496, uargs=000000007b29053c* C2 K' K( a# q! T5 S. t
qupengchao : symname is init_module' @! q' M) o7 K& m t
GN28L95 read table 0xFF chipname-register success,chipname=0xFF.4 M: j* i$ o: u" d1 q, d/ q
UX3360 read table 0x86 register(0x80~0x85) success,chipname=.
! U& o5 B( s) C% d% BUX3361 read table 0x87 register(0x80~0x85) success,chipname=UX33631.! s; d+ p- j- v) A% }; X+ }# {0 U
bsp_mcu_eeprom_mode_select read table register success.
& d7 N$ e/ N1 v5 [judge chip select mcu(0x*0) or eeprom(0x*1) mode ! count=0, judge_reg=0xFF.
6 Q2 k3 x. c* }$ |* z) \; u$ Zbsp_chip_probe count=0, r_data=0x00.
. d' w% o8 P) ?UX3361 found.
7 v4 {7 J/ L/ ~& K6 Ubsp_UX3361_probe 0x51 success! {8 i. @3 n, Q, w
Optical select UX3361 mode is MCU.
5 ~9 v$ F7 R& B3 x: Mvendor name = ZTE_XGPON1ASY
. g* Q! `3 R) |4 z# r9 Y7 ]* w# T0 z) e' n# ^' A, {
temp_PN = ▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒
3 @0 l, D/ i, F0 N) v4 C1 | [
' S* C; ]) [: r+ V optical PN(0x60) = ▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒8 ?. w; `/ x* l: y2 w( J0 u: a9 j
optical PN(0x28) = GN28L950 ^$ ]7 q7 h1 ^, Q+ w* U
dinit_module: umod=000000006c23bced, len=34880, uargs=000000007b29053c7 U/ g- W2 s1 b- Y
qupengchao : symname is init_module
) ] b, e" M+ k$ o( Pudpwatchd inited!
/ L7 {1 S( f4 ?- M! }kudp inited!
% t c1 V# S" m- s/ f L, Rinit_module: umod=00000000e819560c, len=332416, uargs=000000007b29053c* ?& ?2 `, v! e8 Y4 ~$ s5 b
dsp_dev: magic '4.19.136 SMP preempt mod_unload ARMv7 p2v8 ' should be '4.19.136 + SMP mod_unload aarch64'# ]: P% h$ |+ D! P
voip_codec: module PLT section(s) missing/ Q6 O4 ]: A6 T% k6 }
qupengchao : symname is init_module/ B* R4 F6 P7 t
Init codec v2.5(2019-09-18)!8 F8 W' f; j$ a2 |: z
init_module: umod=00000000ed2969d6, len=161840, uargs=000000007b29053c C: X- P% x& P: V
qupengchao : symname is init_module3 T/ H( p" D3 g" C/ H
P_2833: Setup 0
% ~& Y3 x+ u& Y% j. u7 Z6 |DSP device setup OK!6 c, f9 Q5 I1 P8 W. f( L
dsp binding cpu:13 ]5 P8 l0 T3 \6 M) K
dsp softirq! \! a0 q+ T. U8 B7 U
init_module: umod=000000006c23bced, len=24536, uargs=000000007b29053c
9 { Q) V8 ?; Z. r% ~+ v" p0 E5 dqupengchao : symname is init_module
9 |, o8 `, [/ D, H5 g( nG_XGSPON_MODE is 0(XGPON)
2 S. X: Y ?$ finit_module: umod=000000006c23bced, len=27960, uargs=000000007b29053c
( _ U, D2 y; R1 y6 h$ Kqupengchao : symname is init_module* ^) o" q/ ]4 G' Z( h
dGN28L95 read table 0xFF chipname-register success,chipname=0xFF.0 q! r2 o0 V6 L
UX3360 read table 0x86 register(0x80~0x85) success,chipname=.8 ?3 J( x3 c! p6 B7 }
UX3361 read table 0x87 register(0x80~0x85) success,chipname=UX33631.
- E6 J. |* s6 ?& @6 U4 H" N) ]bob chip select is UX3361.
+ L) _* {% e6 \- N4 vbsp_mcu_eeprom_mode_select read table register success.
' d0 X# ^; Q; _2 X- Zjudge chip select mcu(0x*0) or eeprom(0x*1) mode ! count=0, judge_reg=0xFF.
# Z7 Q7 c0 f5 D2 Gdbsp_chip_probe count=0, r_data=0x00.9 p* r" ]9 f, M/ a
UX3361 found.( q7 e. t4 y$ p' c$ V
bob select UX3361 mode is MCU.
; P- V5 T+ Z) g4 M' I) Y& OKmodule GN28L95.ko insmod successfully !# H9 L& W% E- h" y+ e& x
bobtest create /userconfig/GN28L95_datas_backup/BOB_CHIP_SELECT1 [+ Y, Q9 ~) M* L+ ` M: p" u
Bob chip_type: UX3361
/ s( m' [* M5 B$ C# pbobtest GET_BOB_CHIP_SELECT OK, j9 D+ M, a, p
bobtest create /tmp/UX3361_MCU_MODE/ @5 B1 v. u2 Z& j3 i, B7 k6 G
Bob chip_type: UX3361
' R) T$ N! B; S5 j- c# I' dbobtest GET_UX3361_MCU_MODE OK# z8 L7 C; R( _1 G- M2 q
WLAN_TMP_MD5SUM_VALUE=717e1cd37329309ec465387e99e04245! E$ `% }- ^' {6 K6 V* n8 M
USERCONFIG_TMP_MD5SUM_VALUE=717e1cd37329309ec465387e99e042452 f* c6 R, z t6 _$ m( e* `7 j
dWLAN_NOW_MD5SUM_VALUE=717e1cd37329309ec465387e99e042458 ~1 H# E' M) E0 o B
USERCONFIG_NOW_MD5SUM_VALUE=717e1cd37329309ec465387e99e042454 W& `( ~ M) M- A
WLAN_TMP_MD5SUM_VALUE == USERCONFIG_TMP_MD5SUM_VALUE, Z* A# ~) |. Q3 R3 Y
WLAN_NOW_MD5SUM_VALUE == USERCONFIG_NOW_MD5SUM_VALUE, everything is OK, leave!
# R5 { t2 K8 G; N: P9 Y& e* ]Bob chip_type: UX3361
$ v$ y% {6 e3 |8 Y- d, ~# x, } d8 tbobtest write_all_datas_to_UX3361,load data from flash to UX3361!
2 @" n k! s5 B0 }. j$ a* m6 jbobtest table_select_UX3361 128 OK( F% J- h$ k8 W' |* W8 D
bobtest reply_read_reg 162 183 0
1 F1 S% p8 J" M, ^dbobtest table_select_UX3361 128 OK
4 X: J$ y. ]" e6 [% H- O8 Mbobtest write_data_to_UX3361 162 0 123
0 ?- Q9 b: }+ q( ~' o: T2 Fdbobtest table_select_UX3361 129 OK
/ @0 L. [. @& [ h5 q' ~bobtest write_data_to_UX3361 162 128 107) H5 }7 O ^/ `( c# d$ q
dbobtest table_select_UX3361 130 OK
0 ]' _& \, W7 G9 u4 V7 L3 d X) F3 Tbobtest write_data_to_UX3361 162 128 107' I7 y/ v7 d8 M, E# [) j( m0 O
bobtest table_select_UX3361 131 OK6 H6 ]. X) a& s3 Z' ?, U9 r. U6 N! V
bobtest write_data_to_UX3361 162 128 107
/ u; a0 H3 a* Jdbobtest table_select_UX3361 132 OK2 I8 W" _. [+ h4 A- _$ W- Q
bobtest write_data_to_UX3361 162 128 128
& p+ Z5 o) L3 C- n+ r2 Bdbobtest table_select_UX3361 133 OK
# @" s) L% [+ z& qbobtest write_data_to_UX3361 162 128 1289 i+ d; F- g$ W4 Q3 b
ddbobtest table_select_UX3361 134 OK. d9 U# H5 R8 O8 n; i8 ?; B% H
bobtest write_data_to_UX3361 162 128 43 F7 f* q& B# h/ {% J& B
bobtest table_select_UX3361 128 OK! `, G+ m( N5 P( l# \& v
bobtest write_data_to_UX3361 162 128 1283 M: ]% c# T" u8 p
dbobtest table_select_UX3361 128 OK
! Z1 N" ~4 i1 E7 O* s7 P5 dbobtest write_all_datas_to_UX3361 duration: 1.237986
0 Q/ z1 Q6 @) l* v, F3 E0 dwrite_all_datas_to_UX3361 finish!!!
4 ]0 }: ~6 b& s exit factory mode!5 Y* R$ G. C3 o0 w" f' ~) ~
init_module: umod=000000006c23bced, len=33528, uargs=000000007b29053c# c+ V0 A8 \4 v( o# [
dqupengchao : symname is init_module! [& Q8 H( ^. N# X+ g
success : download_init 1343
; e/ B$ e* K& o& @0 yinit_module: umod=000000006c23bced, len=38288, uargs=000000007b29053c+ w( N6 O% y y( Q
qupengchao : symname is init_module
( b, c/ s+ L; E+ D( ?[kernel upload]:upload init enter
! ?5 a3 [ e) D$ Y+ z2 h[kernel upload]:upload init sucess; I* {( U$ C: Z2 i# X; P c
IPv6: ADDRCONF(NETDEV_UP): tunTX: link is not ready9 p! j8 D9 {: ~2 A
IPv6: ADDRCONF(NETDEV_UP): tapTX: link is not ready
) w+ N$ i$ H: F: Q" i) sMemory mapped at address 0xf7b2f000.' k- j$ N, a# G$ |. f
Value at address 0x19140240 (0xf7b2f240): 0x0
8 }! [* N' }! @3 \& ]/ ZWritten 0x1; readback 0x1
6 L( q( p5 T( |: L4 R5 B. S" H' Rsky:loop check_and_reinit phy$ i5 ]: K3 L+ J6 Y5 P- u) g! f. N
region code:307
9 V# i, a n3 T1 Z& Q' yregion name:Beijing M6 h6 F! w4 i5 Q( n1 Z3 \8 _
dsky: lan:[4], pots[0], wifi[2]3 Y- f. L9 Q6 \
sky: could not found config xml [/etc/gponcfg/db_default_Beijing_novoip_cfg.xml]
& d: }8 J; v4 B8 j3 Usky: try [/etc/gponcfg/db_default_Beijing_cfg.xml]& G3 `" z2 K( j& l/ q
sky: found config xml [/etc/gponcfg/db_default_Beijing_cfg.xml]
+ J* E; h# U" }8 n. P+ [7 ^8 _USER_CFG is same as ETC_CFG, donot need copy
! e" ^6 @4 X8 @& V- [0 |4 d===================================================================- y0 N0 s2 o) r* k! S
Database default setting is [current : 307]
9 w+ u# i+ i: X0 m7 z3 f3 mchown: /webpages: No such file or directory1 I! H1 q0 P8 u: Z$ ?
dFailed to set capabilities on file '/bin/ipsec/starter': No such file or direct ory
) d" n* h! y4 e# [: w& f3 G1 J( I& I/ m1 ?Failed to set capabilities on file '/bin/ipsec/charon': No such file or director y, m2 l% r! \. c) ? k
dmodel:6 v2 X$ S5 y8 R' z! z
SK-D847N
; x( T; t5 P- }, m, Edsoftversion:
/ l: B' o3 ~0 a- u; yV2.0.0
: J5 k( c+ q! L5 |& A2 \: W+ Y- Vdhardversion:# K: W. i0 e7 ^9 B/ r9 e
V2.0
5 G3 t* K# S; \2 g1 F% Gdfull_version:9 t* Z3 F- _0 O/ C; V9 z# D: N8 L m/ ]
SK-D847N_V2.0.0_SVN317966_VID002_DQ307
q) z! M5 \6 A. ]2 f$ M2 }*****************pc start********************
* l0 R, q) d9 S6 E, D6 n. H0 }! ~*****************echo 5000 > /proc/sys/vm/min_free_kbytes********************
6 u7 r. ] \3 G0 z" K4 X" _11930:23:20 [U_cspd][Warn] [zxicd_main.c(191)wifi_proc_contr] clib_scan_wlan_chi p cChipNum=29 }7 Y; ?- f V" u! W
OSS: start cspd[0x10000]3 E* c, J2 u" Z
dchmod: /usr/local/osgi: Read-only file system' P2 Y6 v4 E+ J' C
/wlan/age.txt exist, f! o! H3 k S$ Z
" s# l# G/ Q# W" a$ u h0 O
11930:23:21 [firewall][Error] [fwsc_mgr.c(752)reg_fwsfs_mgr_p] reg_fwsfs_mgr_pdt _cb melon
5 ^& e# c, t& T. O* I11930:23:21 [dss_mgr][Warn] [dss_lla.c(946)si_dss_lla_main] The Dss' lpMsg is nu ll.
7 Z3 g; Z. q5 q- M11930:23:21 [wlan_adapter][Error] [wlan_adapter_mt(362)Mtk_Init_7916] ====>Mtk_I nit_7916!
/ x( g+ t7 v: Z% G+ y1 k" p11930:23:21 [wlan_adapter][Error] [wlan_adapter_ma(57)wlan_type_init] wlan_chip[ 3].Init790a_7906!* O5 |0 }. ~* _; v
11930:23:21 [wlan_adapter][Alert] [wlan_adapter_mt(397)rlk_wlan_adapte] rlk_wlan _adapter_main, g_Wlan_Card_Max=2
1 Z0 U% \0 |$ ~- F0 C11930:23:21 [osgi_proxy][Warn] [osgi_proxy_mgr.(496)OsgiProxyMain] OSGI_PROXY_PI D tUsbDevInfoListShmid sinit_module: umod=000000006c23bced, len=9768, uargs=0000 00007b29053c
" m0 R0 L3 I/ c% c+ nhmget init ok!
( h3 A! F6 T$ ~! f1 {dbg: runing cmd[cat /proqupengchao : symname is init_module; F7 o6 v) Z8 q9 V% s7 ]
c/capability/boardtype | sed -n 1p | awk -F ": " '{print $2}']
3 n3 k* s' D6 Y: z9 n2 E[si_lan_eth_filter_init 71] start.
+ @6 G8 m3 o( z/ @/ i' R11930:23:21 [schedule_reboot][Error] [schedule_reboot(365)schedule_reboot] mx_de bug schedule_reboot_init
9 L9 s0 n. w9 \+ B) Ldbg: runing cmd[cd /etc/Wireless/RT2860AP; find ./ -iname "MT7916_EEPROM*tdy09.b in" | sed -n 1p | awk -F '/' '{print $2}']
: |# o$ M2 V/ D/ R& V5 r[get_obj_string]obj_str=MT7916_EEPROM_tdy09.bin; _, e7 O# C) |6 H7 h$ J% K# j
11930:23:21 [DB][Error] [dbc_mgr_file_xm(3219)zxicDbXMLCreate] zxicDbXMLCreateTb lLoad tblname(EASYMESHCONFIG) ptViewParamFun is NULL error.7 m% f& Z% F# N# _4 \
11930:23:21 [DB][Error] [dbc_mgr_file_xm(3219)zxicDbXMLCreate] zxicDbXMLCreateTb lLoad tblname(UpgFirReboot) ptViewParamFun is NULL error.7 B! B* w( S- c9 R a5 z
; Y0 X4 Q, z( `; X, U" ]
11930:23:21 [DB][Error] [dbc_mgr_file_xm(3219)zxicDbXMLCreate] zxicDbXMLCreateTb lLoad tblname(LedTime) ptViewParamFun is NULL error.! ~8 O* D& X/ z
11930:23:21 [wlan_adapter][Warn] [wlan_adapter_mt(6387)checkAndSetEepr] both /wl an/MT7916_EEPROM.bin and /tagparam/MT7916_EEPROM_bak.bin exist, d2 d+ W9 n0 ^! T0 k6 [
11930:23:21 [wlan_adapter][Error] [wlan_adapter_mt(133)checkAndSetEepr] ENTER ch eckAndSetEepromFileMd5_7916(133)
! S" R a7 i; s8 _: f( E. `11930:23:21 [DB][Error] [dbc_view_dev_in(231)Get_Wifi_Type] Get_Wifi_Type:e_wifi _type=0x20
( \; [: b. | O9 v7 m9 Q% y: T+ xSKY_MODEL_NAME has setted, leave!. \+ H: Z7 B+ {4 } o: I/ @* H7 y
11930:23:21 [DB][Error] [dbc_view_board_(143)GetStrFromFile] pon not found.# y! a) h& @2 R: J) {6 Y. X5 N
11930:23:21 [DB][Error] [dbc_view_dev_in(351)dbGetPortCapabi] Get pon port faile d!
) N; a! m' \/ E r11930:23:21 [DB][Error] [dbc_view_board_(143)GetStrFromFile] ups not found.
7 \* u/ }* r+ v1 c11930:23:21 [DB][Error] [dbc_view_board_(633)dbDefBoardInfo] GetUpsDevNum failed !
% q( Z9 v/ C. U f7 a11930:23:21 [DB][Warn] [dbc_view_telnet(71)is_region_0] sky:init telnetcfg, regi on is default [False]: o9 b3 u( l/ N, q' J
11930:23:22 [DB][Warn] [dbc_mgr_init_cf(413)sky_db_init_mob] MobileAppInfo.BooTy pe set to 1
0 v! S4 Z6 V. X7 F8 X$ A5 F3 b11930:23:22 [e8_vlanbind_mgr][Error] [e8_macbind_mgr.(80)macbind_init_op] macbin d init option60 msg queue success; z1 ~# R8 W3 P- e, c, C
?! D- M* [( `. Q; f5 C11930:23:22 [firewall][Error] [fwlevel_mgr.c(760)reg_fwlevel_mgr] reg_fwlevel_mg r_pdt_cb melon
( z) v, R/ Q7 z& _11930:23:23 [wlan_adapter][Warn] [wlan_adapter_mt(6592)md5_sum_cmp] ************ ENTER md5_sum_cmp(6592) **************# ]5 a4 D a* L" Q; }
11930:23:23 [wlan_adapter][Warn] [wlan_adapter_mt(6599)md5_sum_cmp] md5_sum_cmp [/tagparam/MT7916_EEPROM_MD5.txt] [/var/tmp/MT7916_EEPROM_MD5.txt]
, `/ B, a- G1 |5 N! b: [; [11930:23:23 [wlan_adapter][Warn] [wlan_adapter_mt(6605)md5_sum_cmp] open /tagpar am/MT7916_EEPROM_MD5.txt fail!
+ v# o' Q2 F% F+ F11930:23:23 [wlan_adapter][Warn] [wlan_adapter_mt(6592)md5_sum_cmp] *<3000000005 >11930:23:23 [KIGMPSNP][Error] [br_multicast_se(2800)br_config_mc_pa] dev_get_by _name error !
: _9 B9 q3 r2 `5 ?) y2 E0 A6 `***********ENTER md5_sum_cmp(6592) *ethdrv_dev_ioctl ,brdev_set.port_id 0 ,brde v_set.name eth0 ,brdev_set.flag 0, L2 S: p& O% i1 l
*************: B0 A: f# o0 \- Y% x5 W9 U8 x
11930:23:23 [wlan_adapter][Warn] [wlan_adapter_mt(6599)md5_sum_cmp] md5_sum_cmp [/tagparam/MT7916_EEPROM_bak_MD5.txt] [/var/tmp/MT7916_EEPROM_bak_MD5.txt]
8 L2 y7 M: Z0 o2 D. ^. l% n11930:23:23 [wlan_adapter][Warn] [wlan_adapter_mt(6605)md5_sum_cmp] open /tagpar am/MT7916_EEPROM_bak_MD5.txt fail!9 h, ~/ X5 I$ n4 v" ?: o% ~7 H
11930:23:23 [wlan_adapter][Warn] [wlan_adapter_mt(139)checkAndSetEepr] md5_maste r_flag=-1, md5_backup_flag=-1: G- r! k' k! n9 K
11930:23:23 [wlan_adapter][Warn] [wlan_adapter_mt(174)checkAndSetEepr] /wlan/MT7 916_EEPROM.bin and /tagparam/MT7916_EEPROM_bak.bin md5 are not verify ok.
- K- ` G& N7 m7 N, H8 V11930:23:23 [OSS_cspd][Warn] [oss_sche.c(897)RunProcess] RunProcess process[wlan _adapter] Event[0x1100] dwUsedTicks[289]4 X, l: t1 a- w1 e R% f' `" B
get regioncode 33010000; z7 n/ B% N: C
11930:23:23 [ct_userinfo_mgr][Warn] [e8_ctuserinfo_m(3184)si_get_province] now i n func si_get_province_map+ g7 t `9 n+ E: ?
11930:23:23 [ct_userinfo_mgr][Warn] [e8_ctuserinfo_m(3214)si_get_province] Provi nce:BEJ
! `$ t; H0 u9 I5 R+ j11930:23:23 [dss_mgr][Warn] [dss_lla.c(946)si_dss_lla_main] The Dss' lpMsg is nu ll.. {) b# }7 F: J1 E( d. K8 P+ t
11930:23:23 [route_mgr][Error] [route_mgr.c(2255)si_db_init_defg] si_db_qry_defa ult_rt: no default RT
6 {9 a) Z' _0 g, r1 Y7 h. F11930:23:23 [route_mgr][Warn] [route6_mgr.c(238)si_db_v6_init_d] si_db_qry_defau lt_rt6: no default RT
\- v9 Y+ c2 [( {7 a/ h( [[pm_upmode_info_get] UpMod close uart!9 F- w o6 Q t l' y$ w
o, |+ a& d, o4 k2 n" l s: ]% o8 h; G8 T% Q* A$ O5 t2 u
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发表于 2024-12-29 19:12:31