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按1-9都不行8 q9 M9 ~* Y2 p# H
[05000C07][05000C07]
- F* \) s- \3 S' \, M8 g5 o' yDDR Calibration DQS reg = 00008787( V1 |# a: _$ r1 t f9 D
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U-Boot 1.1.3 (Jul 25 2018 - 03:19:13)
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: E+ Z$ |4 |7 f: }3 ]Board: Ralink APSoC DRAM: 64 MB
" {9 _ t5 i3 p2 T/ S4 w6 FPower on memory test. Memory size= 64 MB...OK!
) ]% t+ `% Q& @" Frelocate_code Pointer at: 83fa8000
* W6 ]2 ~6 I6 N |RT2880_RSTSTAT_REG 0xc0030000. d9 l$ z0 E4 h: ?3 l
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Board power on Occurred
+ A/ |* V) u2 x) C; t***************************! p0 s! g2 ]9 f& K
flash manufacture id: ef, device id 40 181 \4 D2 r- e: f; h# s' c/ ~( U
find flash: W25Q128BV
# K* s4 e& ?' D- penv is right!' R) Y* r) {, R+ V. B2 C. B0 I4 Y" V
============================================; k4 e ~; y ~9 ?5 b2 v
Ralink UBoot Version: 4.3.0.0" J9 ~7 R% n/ ~& l. A2 S E' f# r
--------------------------------------------: }: `5 M0 B, z# V
ASIC 7628_MP (Port5<->None)
2 {8 a0 T5 _# L, M( gDRAM component: 512 Mbits DDR, width 16% O0 V: r" N* W; p/ k
DRAM bus: 16 bit
$ k9 ~% k: L0 x. X* nTotal memory: 64 MBytes
; @3 m0 C& K' sFlash component: SPI Flash, l) H; N, F; M* Y8 Q8 I' F5 A
Date:Jul 25 2018 Time:03:19:13! J+ j5 h/ ?" c3 ?+ U
============================================
9 J, T- { l" K" z1 Wicache: sets:512, ways:4, linesz:32 ,total:65536
5 c' k; c+ N, t j% `( K A- Rdcache: sets:256, ways:4, linesz:32 ,total:32768, [" M' ?) ]% G" h$ [* n
* a. }! K& U, W5 t% _+ @ ##### The CPU freq = 575 MHZ ####9 R& x% @7 K, ?1 H [. [1 h6 c
estimate memory size =64 Mbytes5 f" g+ O5 n# V
RESET MT7628 PHY!!!!!!( n$ Y9 k! E, D0 h
Please choose the operation:
3 U2 W* q. ^+ T# j# _' T- R7 R v! V 1: Load system code to SDRAM via TFTP.
6 n2 `$ L: }9 `& r- i! W 2: Load system code then write to Flash via TFTP.# s3 B; |3 w$ ^. E7 {0 ?
3: Boot system code via Flash (default).
& w+ g9 C2 j4 b. `- ^3 M- v 4: Entr boot command line interface.9 Y! O% p8 ^7 B0 c- a+ t: x/ L
5: Load common filesystem then write to Flash via TFTP.
9 V( q3 Q7 w c( L9 V* V* I 7: Load system code via web.; A: ] l; H' T2 A9 r
9: Load Boot Loader code then write to Flash via TFTP.
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n3: System Boot system code via Flash.) B7 r7 a% p# N" j
Booting System 15 n* s" S+ t; O6 S& c! G' W
Erasing SPI Flash...
8 |9 h3 F4 Y* w5 f/ r# {9 Praspi_erase: offs:30000 len:10000' H' p8 @4 x' h
.
' F2 n; K0 H9 Q* lWriting to SPI Flash...9 K) r8 l, s. M6 F4 |9 o
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done! X/ y- Y' X; @) p! f) v- J2 r
## Booting image at bc180000 ...8 p! |8 Q; _2 @; ]. A- A
Image Name: MIPS OpenWrt Linux-3.10.14
" N0 {3 J. ]$ f! T# K Image Type: MIPS Linux Kernel Image (lzma compressed)
& B7 [5 x$ x. @6 }' c Data Size: 1425851 Bytes = 1.4 MB
' s" f7 I& X5 h" v) t Load Address: 80000000
, v3 W) l8 J9 a& `' U; h Entry Point: 80000000) Z# {# F u8 ~: W$ p' I
Verifying Checksum ... OK
y. {) ~$ o1 u- i3 V( a7 s$ [ Uncompressing Kernel Image ... OK
% _) |( e& a4 x- t# p/ tcommandline uart_en=0 factory_mode=0 mem=64m root=/dev/mtdblock9
z( _# ~5 n& A+ TNo initrd
7 Q \! U* `4 y. i4 A( `: s R## Transferring control to Linux (at address 80000000) ...
# Q, D: k; r* S5 F. V+ u## Giving linux memsize in MB, 64( Q/ {1 i' w' l
/ `4 {& g4 m+ Z3 j0 r8 G7 u0 aStarting kernel ...4 a k* g+ j0 o# F
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1 B: r4 I% r# @+ i! _4 e h
LINUX started...
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THIS IS ASIC
, t7 B; c8 d4 p0 ?0 M8 W[ 0.000000] Initializing cgroup subsys cpuset" [' c' [2 ^; r
[ 0.000000] Initializing cgroup subsys cpu
5 T9 C8 R. |! S5 j$ t3 Z x[ 0.000000] Linux version 3.10.14 (jenkins@dea8cc7a4bde) (gcc version 4.6.3 20120201 (prerelease) (Linaro GCC 4.6-2012.02) ) #1 MiWiFi-R3A-2.18.40 Thu Nov 1 11:25:58 UTC 2018
. C- {6 T6 a, e" x[ 0.000000]+ n5 @8 t2 {5 b g; s$ Z5 j
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